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* Revert "[AMDGPU] Invert the handling of skip insertion."Nicolai Hähnle2020-02-031-6/+9
* [AMDGPU] Invert the handling of skip insertion.cdevadas2020-01-151-9/+6
* [AMDGPU] Come back patch for the 'Assign register class for cross block value...Alexander Timofeev2019-10-141-4/+3
* [AMDGPU] Partial revert for the ba447bae7448435c9986eece0811da1423972fddAlexander Timofeev2019-06-061-3/+4
* [AMDGPU] Divergence driven ISel. Assign register class for cross block va...Alexander Timofeev2019-05-261-4/+3
* Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for c...Peter Collingbourne2019-05-251-3/+4
* [AMDGPU] Divergence driven ISel. Assign register class for cross block values...Alexander Timofeev2019-05-241-4/+3
* RegAllocFast: Leave unassigned virtreg entries in mapMatthias Braun2018-11-071-17/+16
* [AMDGPU] Preliminary patch for divergence driven instruction selection. Immed...Alexander Timofeev2018-09-111-1/+2
* [AMDGPU] Revert b0efc4fd6 (https://reviews.llvm.org/D40556)Alexander Timofeev2018-04-251-3/+4
* AMDGPU: Don't leave dead illegal VGPR->SGPR copiesMatt Arsenault2018-03-191-2/+3
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-3/+3
* [AMDGPU] SiFixSGPRCopies should not modify non-divergent PHIAlexander Timofeev2017-12-011-4/+3
* AMDGPU: Fix -enable-var-scope violationsMatt Arsenault2017-11-121-3/+3
* [AMDGPU] Optimize SI_IF lowering for simple if regionsStanislav Mekhanoshin2017-07-261-2/+0
* [AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests.Mark Searles2017-06-021-9/+2
* AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelMatt Arsenault2017-03-211-3/+3
* AMDGPU: Always allocate emergency stack slot at offset 0Matt Arsenault2017-02-221-17/+15
* AMDGPU: Don't use stack space for SGPR->VGPR spillsMatt Arsenault2017-02-211-2/+9
* AMDGPU/SI: Add back reverted SGPR spilling code, but disable itMarek Olsak2016-11-251-15/+15
* Revert "AMDGPU: Fix MMO when splitting spill"Marek Olsak2016-11-251-15/+15
* AMDGPU: Fix MMO when splitting spillMatt Arsenault2016-11-231-15/+15
* AMDGPU/SI: Avoid creating unnecessary copies in the SIFixSGPRCopies passTom Stellard2016-11-161-4/+4
* AMDGPU: Default to using scalar mov to materialize immediateMatt Arsenault2016-11-011-10/+10
* AMDGPU: Assume spilling will occur at -O0Matt Arsenault2016-10-131-32/+32
* AMDGPU: Use unsigned compare for eq/neMatt Arsenault2016-09-301-4/+4
* AMDGPU: Partially fix control flow at -O0Matt Arsenault2016-09-291-0/+296
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