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path: root/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
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* Revert "[AMDGPU] Invert the handling of skip insertion."Nicolai Hähnle2020-02-031-104/+208
* [AMDGPU] Invert the handling of skip insertion.cdevadas2020-01-151-208/+104
* [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.Michael Liao2020-01-141-16/+16
* [AMDGPU] Come back patch for the 'Assign register class for cross block value...Alexander Timofeev2019-10-141-2/+6
* [AMDGPU] link dpp pseudos and real instructions on gfx10Stanislav Mekhanoshin2019-10-111-271/+4955
* [AMDGPU] gfx10 atomic optimizer changes.Jay Foad2019-08-231-72/+246
* [AMDGPU] Optimize atomic AND/OR/XORJay Foad2019-07-171-0/+36
* [AMDGPU] Optimize atomic max/minJay Foad2019-07-161-0/+108
* [AMDGPU] Fix DPP combiner check for exec modificationJay Foad2019-07-121-0/+4
* [AMDGPU] Pre-allocate WWM registers to reduce VGPR pressure.Neil Henning2019-04-011-3/+1
* [AMDGPU] Fix DPP operand order in atomic optimizerCarl Ritson2019-03-051-1/+3
* [AMDGPU] Fix DPP sequence in atomic optimizer.Neil Henning2019-02-111-8/+8
* [AMDGPU] Add an AMDGPU specific atomic optimizer.Neil Henning2018-10-081-0/+192
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