| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AMDGPU] gfx1010 core wave32 changes | Stanislav Mekhanoshin | 2019-06-20 | 1 | -0/+6 |
| | | | | | | | Differential Revision: https://reviews.llvm.org/D63204 llvm-svn: 363934 | ||||
| * | [AMDGPU] Pattern for v_xor3_b32 | Stanislav Mekhanoshin | 2019-05-10 | 1 | -0/+31 |
| | | | | | | | | | | This also allows three op patterns to use increased constant bus limit of GFX10. Differential Revision: https://reviews.llvm.org/D61763 llvm-svn: 360395 | ||||
| * | AMDGPU: Generate VALU ThreeOp Integer instructions | Nicolai Haehnle | 2018-12-06 | 1 | -0/+115 |
| Summary: Original patch by: Fabian Wahlster <razor@singul4rity.com> Change-Id: I148f692a88432541fad468963f58da9ddf79fac5 Reviewers: arsenm, rampitec Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, b-sumner, llvm-commits Differential Revision: https://reviews.llvm.org/D51995 llvm-svn: 348488 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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