bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	AMDGPU/GlobalISel: Increase max legal size to 1024	Matt Arsenault	2019-10-01	1	-7/+4
\| \| \| \| \| \| \| \|	There are 1024 bit register classes defined for AGPRs. Additionally OpenCL defines vectors up to 16 x i64, and this helps those tests legalize. llvm-svn: 373350
*	AMDGPU/GlobalISel: Make 16-bit constants legal	Matt Arsenault	2019-09-04	1	-2/+1
\| \| \| \| \| \|	This is mostly for the benefit of patterns which use 16-bit constants. llvm-svn: 370921
*	AMDGPU/GlobalISel: Clamp max implicit_def elements	Matt Arsenault	2019-02-25	1	-0/+86
\| \| \| \|	llvm-svn: 354818
*	GlobalISel: Implement moreElementsVector for implicit_def	Matt Arsenault	2019-02-11	1	-2/+94
\| \| \| \|	llvm-svn: 353754
*	AMDGPU/GlobalISel: Fix non-power-of-2 implicit_def	Matt Arsenault	2019-02-08	1	-0/+28
\| \| \| \|	llvm-svn: 353522
*	AMDGPU/GlobalISel: Restrict g_implicit_def legality	Matt Arsenault	2019-02-07	1	-6/+347
\| \| \| \|	llvm-svn: 353452
*	AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.	Tom Stellard	2018-06-30	1	-0/+20
	Summary: We could split sizes that are not power of two into smaller sized G_IMPLICIT_DEF instructions, but this ends up generating G_MERGE_VALUES instructions which we then have to handle in the instruction selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to keep everything that can fit into a register legal. Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D48777 llvm-svn: 336041