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* AMDGPU: Relax 32-bit SGPR register classMatt Arsenault2019-10-181-2/+2
| | | | | | | | | | | Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This will allow the register coalescer to do a better job eliminating copies to m0. For GlobalISel, as a terrible hack, use SGPR_32 for things that should use SCC until booleans are solved. llvm-svn: 375267
* GlobalISel: Define GINodeEquiv for G_UMULH/G_SMULHMatt Arsenault2019-07-021-0/+85
llvm-svn: 364931
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