| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AArch64] Prefer "mov" over "orr" to materialize constants. | Eli Friedman | 2019-03-25 | 1 | -8/+8 |
| * | [AArch64] Fix bug 35094 atomicrmw on Armv8.1-A+lse | Christof Douma | 2019-03-18 | 1 | -36/+36 |
| * | [AArch64] Improve v8.1-A code-gen for atomic load-and | Oliver Stannard | 2018-02-12 | 1 | -0/+96 |
| * | [AArch64] Improve v8.1-A code-gen for atomic load-subtract | Oliver Stannard | 2018-02-12 | 1 | -0/+112 |
| * | [AArch64] Generate the CASP instruction for 128-bit cmpxchg | Oliver Stannard | 2018-01-29 | 1 | -0/+62 |
| * | [LegalizeDAG] Fix ATOMIC_CMP_SWAP_WITH_SUCCESS legalization. | Eli Friedman | 2018-01-17 | 1 | -6/+37 |
| * | [AArch64] Add basic support for Qualcomm's Saphira CPU. | Chad Rosier | 2017-09-25 | 1 | -0/+1 |
| * | [AArch64] LSE Atomics reorg - part 1 | Joel Jones | 2017-08-05 | 1 | -4/+4046 |
| * | [AArch64] Add preliminary support for ARMv8.1 SUB/AND atomics | Matthew Simpson | 2017-07-13 | 1 | -0/+161 |
| * | [AARCH64][LSE] Preliminary support for ARMv8.1 LSE Atomics. | Christof Douma | 2017-06-21 | 1 | -0/+683 |

