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* Reset kill markers after live interval is reconstructed.Evan Cheng2009-10-091-6/+22
| | | | llvm-svn: 83608
* Preserve HasNSW and HasNUW when constructing SCEVs for Add and MulDan Gohman2009-10-091-4/+12
| | | | | | instructions. llvm-svn: 83606
* When considering whether to inline Callee into Caller,Dale Johannesen2009-10-091-6/+70
| | | | | | | | | and that will make Caller too big to inline, see if it might be better to inline Caller into its callers instead. This situation is described in PR 2973, although I haven't tried the specific case in SPASS. llvm-svn: 83602
* Add the ability to track HasNSW and HasNUW on more kinds of SCEV expressions.Dan Gohman2009-10-091-12/+22
| | | | llvm-svn: 83601
* Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.Bob Wilson2009-10-093-14/+81
| | | | llvm-svn: 83600
* Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.Bob Wilson2009-10-083-13/+77
| | | | llvm-svn: 83598
* Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.Bob Wilson2009-10-083-13/+75
| | | | llvm-svn: 83596
* Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.Bob Wilson2009-10-083-19/+105
| | | | | | Also fix some copy-and-paste errors in previous changes. llvm-svn: 83590
* Remove code that makes no sense.Evan Cheng2009-10-081-2/+0
| | | | llvm-svn: 83589
* Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.Bob Wilson2009-10-083-20/+99
| | | | llvm-svn: 83585
* Update CMake build yet again after a source file was removedDouglas Gregor2009-10-081-1/+0
| | | | llvm-svn: 83575
* It's possible for a global variable to be optimized out of a metadata object. SoBill Wendling2009-10-081-1/+1
| | | | | | we should allow a "null" with this dyn_cast. llvm-svn: 83573
* Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via ↵Anton Korobeynikov2009-10-081-3/+4
| | | | | | movt/movw pair. llvm-svn: 83572
* Clear variable debug info map at the end of the function.Devang Patel2009-10-081-0/+3
| | | | llvm-svn: 83571
* Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.Bob Wilson2009-10-083-12/+85
| | | | llvm-svn: 83568
* Clean up some unnecessary initializations.Bob Wilson2009-10-081-2/+2
| | | | llvm-svn: 83566
* Clean up a comment (indentation was wrong).Bob Wilson2009-10-081-1/+2
| | | | llvm-svn: 83565
* Add a SelectionDAG getTargetInsertSubreg convenience function,Bob Wilson2009-10-081-0/+11
| | | | | | similar to getTargetExtractSubreg. llvm-svn: 83564
* Do not record line number to implicitly mark start of function if function ↵Devang Patel2009-10-082-12/+23
| | | | | | has arguments. Extra line number entries trip gdb in some cases. llvm-svn: 83563
* Add missing names for the XCore specific LADD and LSUB nodes.Richard Osborne2009-10-081-0/+2
| | | | llvm-svn: 83556
* Add a form of addPreserved which takes a string argument, to allow passesDan Gohman2009-10-083-16/+30
| | | | | | | | to declare that they preserve other passes without needing to pull in additional header file or library dependencies. Convert MachineFunctionPass and CodeGenLICM to make use of this. llvm-svn: 83555
* Add some peepholes for signed comparisons using ashr X, X, 32.Richard Osborne2009-10-081-0/+16
| | | | llvm-svn: 83549
* remove LoopVR pass. According to Nick:Chris Lattner2009-10-081-297/+0
| | | | | | | "LoopVR's logic was copied into ScalarEvolution::getUnsignedRange and ::getSignedRange. Please delete LoopVR." llvm-svn: 83531
* Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-083-0/+6
| | | | llvm-svn: 83526
* Cleanup up unused R3LiveIn tracking.Jim Grosbach2009-10-082-19/+2
| | | | llvm-svn: 83522
* Re-enable register scavenging in Thumb1 by default.Jim Grosbach2009-10-084-74/+16
| | | | llvm-svn: 83521
* bugfix. The target may use virtual registers that aren't tracked for re-use ↵Jim Grosbach2009-10-082-20/+27
| | | | | | but are allocated by the scavenger. The re-use algorithm needs to watch for that. llvm-svn: 83519
* Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-083-0/+6
| | | | llvm-svn: 83518
* Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-083-0/+5
| | | | llvm-svn: 83513
* In instcombine's debug output, avoid printing ADD for instructions that areJeffrey Yasskin2009-10-081-3/+5
| | | | | | | already on the worklist, and print Visited when an instruction is about to be visited. Net, on one input, this reduced the output size by at least 9x. llvm-svn: 83510
* Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-073-0/+6
| | | | llvm-svn: 83508
* Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-073-0/+6
| | | | llvm-svn: 83506
* Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-073-0/+5
| | | | llvm-svn: 83502
* reverting thumb1 scavenging default due to test failure while I figure out ↵Jim Grosbach2009-10-074-15/+74
| | | | | | what's up. llvm-svn: 83501
* second half of lazy liveness removal.Chris Lattner2009-10-071-1/+0
| | | | llvm-svn: 83500
* Fix handling of x86 'R' constraint.Dale Johannesen2009-10-071-1/+8
| | | | llvm-svn: 83499
* Enable thumb1 register scavenging by default.Jim Grosbach2009-10-072-10/+6
| | | | llvm-svn: 83496
* Enable thumb1 register scavenging by default.Jim Grosbach2009-10-072-64/+9
| | | | llvm-svn: 83494
* Extract subprogram and compile unit information from the debug info attached ↵Devang Patel2009-10-071-0/+29
| | | | | | to an instruction. llvm-svn: 83491
* Add some instruction encoding bits for NEON load/store instructions.Bob Wilson2009-10-072-140/+165
| | | | llvm-svn: 83490
* 80-column and whitespace fixes.Eric Christopher2009-10-071-135/+156
| | | | llvm-svn: 83489
* Fixed MCSectionMachO::ParseSectionSpecifier to allow an attribute of "none" soKevin Enderby2009-10-071-4/+6
| | | | | | | that a symbol stub section with no attributes can be parsed as in: .section __TEXT,__picsymbolstub4,symbol_stubs,none,16 llvm-svn: 83488
* Add codegen support for NEON vst4 intrinsics with 128-bit vectors.Bob Wilson2009-10-073-9/+94
| | | | llvm-svn: 83486
* Add codegen support for NEON vst3 intrinsics with 128-bit vectors.Bob Wilson2009-10-073-9/+88
| | | | llvm-svn: 83484
* grammarJim Grosbach2009-10-071-1/+1
| | | | llvm-svn: 83483
* Add codegen support for NEON vst2 intrinsics with 128-bit vectors.Bob Wilson2009-10-073-7/+47
| | | | llvm-svn: 83482
* add initializers for clarity. Add missing assignment of PrevLastUseOp.Jim Grosbach2009-10-071-2/+3
| | | | llvm-svn: 83481
* Remove LazyLiveness from the tree. It doesn't work right now, and I'm not ↵Owen Anderson2009-10-071-168/+0
| | | | | | | | going to have the time to finish it any time soon. If someone's interested it, they can resurrect it from SVN history. llvm-svn: 83480
* Add codegen support for NEON vld4 intrinsics with 128-bit vectors.Bob Wilson2009-10-073-7/+83
| | | | llvm-svn: 83479
* Add another bit of the ARM target assembler to llvm-mc to parse registersKevin Enderby2009-10-071-3/+17
| | | | | | | | with writeback, things like "sp!", etc. Also added some more stuff to the temporarily hacked methods ARMAsmParser::MatchRegisterName and ARMAsmParser::MatchInstruction to allow more parser testing. llvm-svn: 83477
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