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| author | Kevin Enderby <enderby@apple.com> | 2009-10-07 18:01:35 +0000 | 
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2009-10-07 18:01:35 +0000 | 
| commit | 2207e5fc7be18c3d1d1f36cf6c94b5b752ba3e8e (patch) | |
| tree | 5860930e056f2883f4b553aa7d9dd83c7943b5f5 /llvm/lib | |
| parent | 9b60992120f766c9641f9d37431cf41caf02c2a9 (diff) | |
| download | bcm5719-llvm-2207e5fc7be18c3d1d1f36cf6c94b5b752ba3e8e.tar.gz bcm5719-llvm-2207e5fc7be18c3d1d1f36cf6c94b5b752ba3e8e.zip | |
Add another bit of the ARM target assembler to llvm-mc to parse registers
with writeback, things like "sp!", etc.  Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.
llvm-svn: 83477
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 20 | 
1 files changed, 17 insertions, 3 deletions
| diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 4574607c93f..c4244c72019 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -100,6 +100,7 @@ struct ARMOperand {      struct {        unsigned RegNum; +      bool Writeback;      } Reg;      // This is for all forms of ARM address expressions @@ -146,10 +147,11 @@ struct ARMOperand {      return Res;    } -  static ARMOperand CreateReg(unsigned RegNum) { +  static ARMOperand CreateReg(unsigned RegNum, bool Writeback) {      ARMOperand Res;      Res.Kind = Register;      Res.Reg.RegNum = RegNum; +    Res.Reg.Writeback = Writeback;      return Res;    } @@ -193,10 +195,17 @@ bool ARMAsmParser::ParseRegister(ARMOperand &Op) {    RegNum = MatchRegisterName(Tok.getString());    if (RegNum == 0)      return true; - -  Op = ARMOperand::CreateReg(RegNum);    getLexer().Lex(); // Eat identifier token. +  bool Writeback = false; +  const AsmToken &ExclaimTok = getLexer().getTok(); +  if (ExclaimTok.is(AsmToken::Exclaim)) { +    Writeback = true; +    getLexer().Lex(); // Eat exclaim token +  } + +  Op = ARMOperand::CreateReg(RegNum, Writeback); +    return false;  } @@ -396,6 +405,8 @@ unsigned ARMAsmParser::MatchRegisterName(const StringRef &Name) {      return 2;    else if (Name == "r3")      return 3; +  else if (Name == "sp") +    return 13;    return 0;  } @@ -406,6 +417,9 @@ bool ARMAsmParser::MatchInstruction(SmallVectorImpl<ARMOperand> &Operands,    assert(Op0.Kind == ARMOperand::Token && "First operand not a Token");    const StringRef &Mnemonic = Op0.getToken();    if (Mnemonic == "add" || +      Mnemonic == "stmfd" || +      Mnemonic == "str" || +      Mnemonic == "ldmfd" ||        Mnemonic == "ldr")      return false; | 

