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* Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add ↵Johnny Chen2011-03-282-5/+18
| | | | | | | | some test cases. Add comments to ThumbDisassemblerCore.h for recent change made for t2PLD disassembly. llvm-svn: 128417
* Again adding a C API to the disassembler for use by such tools as Darwin'sKevin Enderby2011-03-282-0/+259
| | | | | | | | | | | otool(1), this time with the needed fix for case sensitive file systems :) . This is a work in progress as the interface for producing symbolic operands is not done. But a hacked prototype using information from the object file's relocation entiries and replacing immediate operands with MCExpr's has been shown to work with no changes to the instrucion printer. These APIs will be moved into a dynamic library at some point. llvm-svn: 128415
* Remove tabs I accidentally added.Nick Lewycky2011-03-281-15/+15
| | | | llvm-svn: 128413
* Make more use of PHINode::getNumIncomingValues().Jay Foad2011-03-282-5/+5
| | | | llvm-svn: 128406
* ptx: clean up branch code a bitChe-Liang Chiou2011-03-283-16/+17
| | | | llvm-svn: 128405
* Add some debug output when -instcombine uses RAUW. This can make debug ↵Frits van Bommel2011-03-271-1/+4
| | | | | | output for those cases much clearer since without this it only showed that the original instruction was removed, not what it was replaced with. llvm-svn: 128399
* Amend debug output.Jakob Stoklund Olesen2011-03-271-2/+3
| | | | llvm-svn: 128398
* Drop interference reassignment in favor of eviction.Jakob Stoklund Olesen2011-03-271-132/+15
| | | | | | | | | The reassignment phase was able to move interference with a higher spill weight, but it didn't happen very often and it was fairly expensive. The existing interference eviction picks up the slack. llvm-svn: 128397
* Teach the transformation that moves binary operators around selects to preserveNick Lewycky2011-03-271-8/+22
| | | | | | the subclass optional data. llvm-svn: 128388
* Use APInt's umul_ov instead of rolling our own overflow detection.Benjamin Kramer2011-03-271-5/+6
| | | | llvm-svn: 128380
* Constant folding support for calls to umul.with.overflow(), basically ↵Frits van Bommel2011-03-272-3/+18
| | | | | | identical to the smul.with.overflow() code. llvm-svn: 128379
* Add a small missed optimization: turn X == C ? X : Y into X == C ? C : Y. ThisNick Lewycky2011-03-271-0/+13
| | | | | | | | | | removes one use of X which helps it pass the many hasOneUse() checks. In my analysis, this turns up very often where X = A >>exact B and that can't be simplified unless X has one use (except by increasing the lifetime of A which is generally a performance loss). llvm-svn: 128373
* Fix whitespace.NAKAMURA Takumi2011-03-271-2/+2
| | | | llvm-svn: 128370
* Use individual register classes when spilling snippets.Jakob Stoklund Olesen2011-03-262-24/+28
| | | | | | | | | The main register class may have been inflated by live range splitting, so that register class is not necessarily valid for the snippet instructions. Use the original register class for the stack slot interval. llvm-svn: 128351
* Turn SelectionDAGBuilder::GetRegistersForValue into a local function.Benjamin Kramer2011-03-262-19/+16
| | | | | | | | It couldn't be used outside of the file because SDISelAsmOperandInfo is local to SelectionDAGBuilder.cpp. Making it a static function avoids a weird linkage dance. llvm-svn: 128342
* Make helper static.Benjamin Kramer2011-03-261-2/+2
| | | | llvm-svn: 128338
* Simplification noticed by Frits.Bill Wendling2011-03-261-3/+2
| | | | llvm-svn: 128333
* Rework the logic that determines if a store completely overlaps an ealier store.Bill Wendling2011-03-261-15/+23
| | | | | | | | | | | There are two ways that a later store can comletely overlap a previous store: 1. They both start at the same offset, but the earlier store's size is <= the later's size, or 2. The earlier store's offset is > the later's offset, but it's offset + size doesn't extend past the later's offset + size. llvm-svn: 128332
* Fix a typo and add a test.Cameron Zwarich2011-03-261-1/+1
| | | | llvm-svn: 128331
* Collect and coalesce DBG_VALUE instructions before emitting the function.Jakob Stoklund Olesen2011-03-262-110/+187
| | | | | | | | | | | Correctly terminate the range of register DBG_VALUEs when the register is clobbered or when the basic block ends. The code is now ready to deal with variables that are sometimes in a register and sometimes on the stack. We just need to teach emitDebugLoc to say 'stack slot'. llvm-svn: 128327
* Fixed the t2PLD and friends disassembly and add two test cases.Johnny Chen2011-03-262-10/+39
| | | | llvm-svn: 128322
* Fix the bfi handling for or (and a mask) (and b mask). We need the twoEric Christopher2011-03-261-9/+10
| | | | | | | | | | | | | | masks to match inversely for the code as is to work. For the example given we actually want: bfi r0, r2, #1, #1 not #0, however, given the way the pattern is written it's not possible at the moment. Fixes rdar://9177502 llvm-svn: 128320
* PR9561: A store with a negative offset (via GEP) could erroniously say that itBill Wendling2011-03-261-0/+2
| | | | | | | completely overlaps a previous store, thus mistakenly deleting that store. Check for this condition. llvm-svn: 128319
* Remove the files for r128308 as it is causing a buildbot failure.Kevin Enderby2011-03-262-259/+0
| | | | llvm-svn: 128309
* Adding a C API to the disassembler for use by such tools as Darwin's otool(1).Kevin Enderby2011-03-262-0/+259
| | | | | | | | | | This is a work in progress as the interface for producing symbolic operands is not done. But a hacked prototype using information from the object file's relocation entiries and replacing immediate operands with MCExpr's has been shown to work with no changes to the instrucion printer. These APIs will be moved into a dynamic library at some point. llvm-svn: 128308
* Fix DisassembleThumb2DPReg()'s handling of RegClass. Cannot hardcode ↵Johnny Chen2011-03-251-6/+6
| | | | | | | | | | GPRRegClassID. Also add some test cases. rdar://problem/9189829 llvm-svn: 128304
* DisassembleThumb2LdSt() did not handle t2LDRs correctly with respect to ↵Johnny Chen2011-03-251-2/+3
| | | | | | | | RegClass. Add two test cases. rdar://problem/9182892 llvm-svn: 128299
* Modify DisassembleThumb2LdStEx() to be more robust/correct in light of ↵Johnny Chen2011-03-251-6/+6
| | | | | | | | recent change to t2LDREX/t2STREX instructions. Add two test cases. llvm-svn: 128293
* MC: Improve some diagnostics on uses of '.' pseudo-symbol.Daniel Dunbar2011-03-251-1/+18
| | | | llvm-svn: 128289
* Tidyness.Daniel Dunbar2011-03-251-2/+2
| | | | llvm-svn: 128288
* Add a note.Benjamin Kramer2011-03-251-0/+19
| | | | llvm-svn: 128286
* Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. ↵Johnny Chen2011-03-251-0/+5
| | | | | | | | Modify the disassembler to handle that. rdar://problem/9184053 llvm-svn: 128285
* Emit less labels for debug info and stop emitting .loc directives for ↵Jakob Stoklund Olesen2011-03-252-49/+32
| | | | | | | | | | | | DBG_VALUEs. The .dot directives don't need labels, that is a leftover from when we created line number info manually. Instructions following a DBG_VALUE can share its label since the DBG_VALUE doesn't produce any code. llvm-svn: 128284
* Also need to handle invalid imod values for CPS2p.Johnny Chen2011-03-251-4/+11
| | | | | | rdar://problem/9186136 llvm-svn: 128283
* Fix for -pre-RA-sched=source.Andrew Trick2011-03-251-0/+2
| | | | | | | Yet another case of unchecked NULL node (for physreg copy). May fix PR9509. llvm-svn: 128266
* No functionality change, just adjust some whitespace for coding style ↵Nick Lewycky2011-03-251-2/+2
| | | | | | compliance. llvm-svn: 128257
* No functionality change. Fix up some whitespace and switch out "" for '' whenNick Lewycky2011-03-251-3/+3
| | | | | | printing a single character. llvm-svn: 128256
* Ignore special ARM allocation hints for unexpected register classes.Jakob Stoklund Olesen2011-03-252-0/+5
| | | | | | | | | Add an assertion to linear scan to prevent it from allocating registers outside the register class. <rdar://problem/9183021> llvm-svn: 128254
* Modify the wrong logic in the assert of DisassembleThumb2LdStDual() (the ↵Johnny Chen2011-03-251-9/+9
| | | | | | | | register classes were changed), modify the comment to be up-to-date, and add a test case for A8.6.66 LDRD (immediate) Encoding T1. llvm-svn: 128252
* Suppress an unused variable warning in -asserts buildsMatt Beaumont-Gay2011-03-241-0/+1
| | | | llvm-svn: 128244
* Handle the added VBICiv*i* NEON instructions, too.Johnny Chen2011-03-241-2/+7
| | | | llvm-svn: 128243
* Plug a leak by ThumbDisassembler::getInstruction(), thanks to Benjamin Kramer!Johnny Chen2011-03-241-3/+1
| | | | llvm-svn: 128241
* T2 Load/Store Multiple:Johnny Chen2011-03-241-1/+1
| | | | | | | These instructions were changed to not embed the addressing mode within the MC instructions We also need to update the corresponding assert stmt. Also add a test case. llvm-svn: 128240
* Plug a leak in the arm disassembler and put the tests back.Benjamin Kramer2011-03-241-3/+2
| | | | llvm-svn: 128238
* Add asm parsing support w/ testcases for strex/ldrex family of instructionsBruno Cardoso Lopes2011-03-248-61/+111
| | | | llvm-svn: 128236
* ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder ↵Johnny Chen2011-03-241-1/+1
| | | | | | | | | was fooled. Set the encoding bits to {0,?,?,0}, not 0. Plus delegate the disassembly of ADR to the more generic ADDri/SUBri instructions, and add a test case for that. llvm-svn: 128234
* Keep track of directory namd and fIx regression caused by Rafael's patch ↵Devang Patel2011-03-242-12/+29
| | | | | | | | r119613. A better approach would be to move source id handling inside MC. llvm-svn: 128233
* Clean up assembly statement separator support.Jim Grosbach2011-03-243-8/+19
| | | | | | | | The MC asm lexer wasn't honoring a non-default (anything but ';') statement separator. Fix that, and generalize a bit to support multi-character statement separators. llvm-svn: 128227
* The r118201 added support for VORR (immediate). Update ↵Johnny Chen2011-03-241-0/+16
| | | | | | | | ARMDisassemblerCore.cpp to disassemble the VORRiv*i* instructions properly within the DisassembleN1RegModImmFrm() function. Add a test case. llvm-svn: 128226
* Add comments to the handling of opcode CPS3p to reject invalid instruction ↵Johnny Chen2011-03-241-0/+2
| | | | | | | | encoding, a test case of invalid CPS3p encoding and one for invalid VLDMSDB due to regs out of range. llvm-svn: 128220
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