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authorJohnny Chen <johnny.chen@apple.com>2011-03-24 17:04:22 +0000
committerJohnny Chen <johnny.chen@apple.com>2011-03-24 17:04:22 +0000
commit1dd041083d0c80b56b2ce9252206921c00a543a1 (patch)
tree7e4f4ebbabb64c01e7cec335205acd6337e0cdeb /llvm/lib
parenta4ec5b2c19acafaea749c8952344ac766f0d08de (diff)
downloadbcm5719-llvm-1dd041083d0c80b56b2ce9252206921c00a543a1.tar.gz
bcm5719-llvm-1dd041083d0c80b56b2ce9252206921c00a543a1.zip
Add comments to the handling of opcode CPS3p to reject invalid instruction encoding,
a test case of invalid CPS3p encoding and one for invalid VLDMSDB due to regs out of range. llvm-svn: 128220
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
index cc2469f8c29..a9d41325de7 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
@@ -2946,6 +2946,8 @@ static bool DisassembleMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
// of optional arguments is implemented.
if (Opcode == ARM::CPS3p) {
// Let's reject impossible imod values by returning false.
+ // AsmPrinter cannot handle imod=0b00, plus (imod=0b00,M=1,iflags!=0) is an
+ // invalid combination, so we just check for imod=0b00 here.
if (slice(insn, 19, 18) == 0 || slice(insn, 19, 18) == 1)
return false;
MI.addOperand(MCOperand::CreateImm(slice(insn, 19, 18))); // imod
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