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* [CodeGen] Print bundled instructions using the MIR syntax in -debug outputFrancis Visoiu Mistrih2018-02-131-7/+23
| | | | | | | | | | | | | | | | | Old syntax: BUNDLE implicit-def %r0, implicit-def %r1, implicit %r2 * %r0 = SOME_OP %r2 * %r1 = ANOTHER_OP internal %r0 New syntax: BUNDLE implicit-def %r0, implicit-def %r1, implicit %r2 { %r0 = SOME_OP %r2 %r1 = ANOTHER_OP internal %r0 } llvm-svn: 325032
* [AMDGPU] Change constant addr space to 4Yaxun Liu2018-02-136-9/+10
| | | | | | Differential Revision: https://reviews.llvm.org/D43170 llvm-svn: 325030
* [DAGCombiner] Add one use check to fold (not (and x, y)) -> (or (not x), ↵Craig Topper2018-02-131-2/+2
| | | | | | | | | | | | | | | | | | | (not y)) Summary: If the and has an additional use we shouldn't invert it. That creates an additional instruction. While there add a one use check to the transform above that looked similar. Reviewers: spatel, RKSimon Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43225 llvm-svn: 325019
* [X86] Add combine to shrink 64-bit ands when one input is an any_extend and ↵Craig Topper2018-02-131-0/+14
| | | | | | | | | | | | | | | | the other input guarantees upper 32 bits are 0. Summary: This gets the shift case from PR35792. Reviewers: spatel, RKSimon Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43222 llvm-svn: 325018
* [Hexagon] Simplify some code, NFCKrzysztof Parzyszek2018-02-131-114/+44
| | | | llvm-svn: 325014
* [Hexagon] Remove unnecessary checkKrzysztof Parzyszek2018-02-131-2/+0
| | | | llvm-svn: 325013
* [ARM] Allow half types in ConstantPoolSjoerd Meijer2018-02-131-1/+9
| | | | | | | | | | | Change ARMConstantIslandPass to: - accept f16 literals as litpool entries, - if the litpool needs to be inserted in the middle of a big block, then we need to 4-byte align the next instruction in ARM mode. Differential Revision: https://reviews.llvm.org/D42784 llvm-svn: 325012
* [DAG] fix type of undef returned by getNode()Sanjay Patel2018-02-131-2/+2
| | | | | | | | The bug has been lying dormant, but apparently was never exposed, until after rL324941 because we didn't return the correct result for shifts with undef operands. llvm-svn: 325010
* Revert r325001: [CallSiteSplitting] Support splitting of blocks with instrs ↵Florian Hahn2018-02-131-81/+22
| | | | | | | | before call. Due to memsan not being happy with the array of ValueToValue maps. llvm-svn: 325009
* [IR] Fix creating mutable versions of TBAA access tagsIvan A. Kosarev2018-02-131-1/+1
| | | | | | | | | | Due to a typo in D41565, mutable TBAA tags created with createMutableTBAAAccessTag() lose their base types. This patch fixes that typo and updates tests respectively. Differential Revision: https://reviews.llvm.org/D42364 llvm-svn: 325008
* [CallSiteSplitting] Clear ValueToValue maps.Florian Hahn2018-02-131-0/+4
| | | | llvm-svn: 325006
* [CallSiteSplitting] Dereference pointer earlier.Florian Hahn2018-02-131-3/+3
| | | | | | This should make the sanitizers happy. llvm-svn: 325004
* [InstCombine] Simplify getLogBase2 case for scalar/splats. NFCI.Simon Pilgrim2018-02-131-3/+2
| | | | llvm-svn: 325003
* [CallSiteSplitting] Support splitting of blocks with instrs before call.Florian Hahn2018-02-131-22/+77
| | | | | | | | | | | | | | | | | | For basic blocks with instructions between the beginning of the block and a call we have to duplicate the instructions before the call in all split blocks and add PHI nodes for uses of the duplicated instructions after the call. Currently, the threshold for the number of instructions before a call is quite low, to keep the impact on binary size low. Reviewers: junbuml, mcrosier, davidxl, davide Reviewed By: junbuml Differential Revision: https://reviews.llvm.org/D41860 llvm-svn: 325001
* [ARM] Don't print "Requires NEON" error message for M-profileAndre Vieira2018-02-131-0/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D43125 llvm-svn: 325000
* [Thumb] Handle addressing mode AddrMode5FP16Sjoerd Meijer2018-02-131-0/+14
| | | | | | | | This addressing mode wasn't checked, so we were running in an assert. Differential Revision: https://reviews.llvm.org/D43179 llvm-svn: 324996
* [LoopInterchange] Check number of latch successors before accessing them.Florian Hahn2018-02-131-1/+1
| | | | | | | | | | | | | | | | In cases where the OuterMostLoopLatchBI only has a single successor, accessing the second successor will fail. This fixes a failure when building the test-suite with loop-interchange enabled. Reviewers: mcrosier, karthikthecool, davide Reviewed by: karthikthecool Differential Revision: https://reviews.llvm.org/D42906 llvm-svn: 324994
* [X86] Teach EVEX->VEX pass to turn VRNDSCALE into VROUND when bits 7:4 of ↵Craig Topper2018-02-131-2/+27
| | | | | | | | | | the immediate are 0 and the regular EVEX->VEX checks pass. Bits 7:4 control the scale part of the operation. If the scale is 0 the behavior is equivalent to VROUND. Fixes PR36246 llvm-svn: 324985
* [Utils] Salvage debug info from all no-op castsVedant Kumar2018-02-131-4/+7
| | | | | | | | | | | We already try to salvage debug values from no-op bitcasts and inttoptr instructions: we should handle ptrtoint instructions as well. This saves an additional 24,444 debug values in a stage2 build of clang, and (according to llvm-dwarfdump --statistics) provides an additional 289 unique source variables. llvm-svn: 324982
* Revert "Rewrite the cached map used for locating the most precise DIE among ↵David Blaikie2018-02-131-360/+26
| | | | | | | | | | | | | | | inlined subroutines for a given address." Seeing some inlining missing in internal uses of symbolizer. I'll work on a reproduction, tests, improvements & recommit as soon as possible. (Chandler would like it to be known that this improvement did make check-llvm 4x faster... - so there's certainly some fairly good motivation to push on fixing/figuring this out & getting it back in) This reverts commit r321345. llvm-svn: 324981
* [X86] Use getTypeAction in most places that were checking ↵Craig Topper2018-02-131-8/+9
| | | | | | | | ExperimentalVectorWideningLegalization. This will allow more flexibility in what types we legalize via widening or not. This should help with a couple lines in D41062. llvm-svn: 324980
* Revert "Document the shortcomings of DwarfExpression::addMachineReg()."Adrian Prantl2018-02-131-7/+3
| | | | | | | This reverts commit r324972. This commit broke a bot, so perhaps it is testable after all? llvm-svn: 324977
* [Utils] Salvage debug info of DCE'ed mul/sdiv/srem instructionsVedant Kumar2018-02-133-0/+13
| | | | | | | | | | | | | Here are the number of additional debug values salvaged in a stage2 build of clang: 63 SALVAGE: MUL 1250 SALVAGE: SDIV (No values were salvaged from `srem` instructions in this experiment, but it's a simple case to handle so we might as well.) llvm-svn: 324976
* [Utils] Salvage debug info of DCE'ed shl/lhsr/ashr instructionsVedant Kumar2018-02-133-0/+15
| | | | | | | | | | | Here are the number of additional debug values salvaged in a stage2 build of clang: 1912 SALVAGE: ASHR 405 SALVAGE: LSHR 249 SALVAGE: SHL llvm-svn: 324975
* [Utils] Salvage the debug info of DCE'ed 'sub' instructionsVedant Kumar2018-02-131-0/+3
| | | | | | This salvages 14 debug values in a stage2 build of clang. llvm-svn: 324974
* [Utils] Salvage the debug info of DCE'ed 'xor' instructionsVedant Kumar2018-02-133-11/+23
| | | | | | | | This salvages 259 debug values in a stage2 build of clang. Differential Revision: https://reviews.llvm.org/D43207 llvm-svn: 324973
* Document the shortcomings of DwarfExpression::addMachineReg().Adrian Prantl2018-02-131-3/+7
| | | | | | | | | | Also make a drive-by-fix of a bug in the subregister scan code that only triggers with an incomplete or otherwise very irregular machine description. rdar://problem/37404493 llvm-svn: 324972
* GlobalISel: IRTranslate llvm.fmuladd.* intrinsicVolkan Keles2018-02-131-0/+19
| | | | | | | | | | | | Reviewers: qcolombet, ab, dsanders, aditya_nandakumar, bogner Reviewed By: qcolombet Subscribers: rovka, kristof.beyls, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D43090 llvm-svn: 324971
* [InstSimplify] allow exp/log simplifications with only 'reassoc' FMFSanjay Patel2018-02-121-4/+4
| | | | | | | | | | These intrinsic folds were added with D41381, but only allowed with isFast(). That's more than necessary because FMF has 'reassoc' to apply to these kinds of folds after D39304, and that's all we need in these cases. Differential Revision: https://reviews.llvm.org/D43160 llvm-svn: 324967
* [InstCombine] Simplify MemTransferInst's source and dest alignments separatelyDaniel Neilson2018-02-121-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change is part of step five in the series of changes to remove alignment argument from memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the InstCombine pass to cease using the deprecated MemoryIntrinsic::getAlignment() method, and instead we use the separate getSourceAlignment and getDestAlignment APIs to simplify the source and destination alignment attributes separately. Steps: Step 1) Remove alignment parameter and create alignment parameter attributes for memcpy/memmove/memset. ( rL322965, rC322964, rL322963 ) Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. ( rL323597 ) Step 3) Update Clang to use the new IRBuilder API. ( rC323617 ) Step 4) Update Polly to use the new IRBuilder API. ( rL323618 ) Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment() and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278, rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773, rL324774, rL324781, rL324784, rL324955 ) Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reference http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html Reviewers: majnemer, bollu, efriedma Reviewed By: efriedma Subscribers: efriedma, llvm-commits Differential Revision: https://reviews.llvm.org/D42871 llvm-svn: 324960
* Revert "[LSR] Avoid UB overflow when examining reuse opportunities"Adam Nemet2018-02-121-5/+0
| | | | | | | | This reverts commit r324943. Breaking bots, reverting for Gerolf. llvm-svn: 324958
* [WebAssembly] MC: Remove redundant struct typesSam Clegg2018-02-121-52/+35
| | | | | | Differential Revision: https://reviews.llvm.org/D43210 llvm-svn: 324957
* [SafeStack] Use updated CreateMemCpy API to set more accurate source and ↵Daniel Neilson2018-02-123-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | destination alignments. Summary: This change is part of step five in the series of changes to remove alignment argument from memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the creation of memcpys in the SafeStack pass to set the alignment of the destination object to its stack alignment while separately setting the source byval arguments alignment to its alignment. Steps: Step 1) Remove alignment parameter and create alignment parameter attributes for memcpy/memmove/memset. ( rL322965, rC322964, rL322963 ) Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. ( rL323597 ) Step 3) Update Clang to use the new IRBuilder API. ( rC323617 ) Step 4) Update Polly to use the new IRBuilder API. ( rL323618 ) Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment() and [get|set]SourceAlignment() instead. (rL323886, rL323891, rL324148, rL324273, rL324278, rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773, rL324774, rL324781, rL324784 ) Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reference http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html Reviewers: eugenis, bollu Reviewed By: eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42710 llvm-svn: 324955
* [X86] Reverse the operand order of the autoupgrade of the kunpack builtins.Craig Topper2018-02-121-1/+2
| | | | | | | | The second operand needs to be in the lower bits of the concatenation. This matches llvm 5.0, gcc, and icc behavior. Fixes PR36360. llvm-svn: 324953
* Simplify switch statement (NFC)Adrian Prantl2018-02-121-5/+3
| | | | llvm-svn: 324945
* [LSR] Avoid UB overflow when examining reuse opportunitiesGerolf Hoflehner2018-02-121-0/+5
| | | | llvm-svn: 324943
* [WebAssembly] Fix casting MCSymbol to MCSymbolWasm on ELFJacob Gravelle2018-02-121-3/+5
| | | | | | | | | | | | | | Summary: wasm32-unknown-unknown-elf has MCSymbols that are not MCSymbolWasms, so we need a non-asserting cast here. Reviewers: dschuff, sunfish Subscribers: jfb, sbc100, aheejin, llvm-commits Differential Revision: https://reviews.llvm.org/D43205 llvm-svn: 324942
* [DAG] make binops with undef operands consistent with IRSanjay Patel2018-02-121-20/+7
| | | | | | | | | | | | | | | | | | | | | This started by noticing that scalar and vector types were producing different results with div ops in PR36305: https://bugs.llvm.org/show_bug.cgi?id=36305 ...but the problem is bigger. I couldn't keep it straight without a table, so I'm attaching that as a PDF to the review. The x86 tests in undef-ops.ll correspond to that table. Green means that instsimplify and the DAG agree on the result for all types. Red means the DAG was returning undef when IR was not. Yellow means the DAG was returning a non-undef result when IR returned undef. This patch assumes that we're currently doing the right thing in IR. Note: I couldn't find any problems with lowering vector constants as the code comments were warning, but those comments were written long ago in rL36413 . Differential Revision: https://reviews.llvm.org/D43141 llvm-svn: 324941
* [X86] Simplify X86DAGToDAGISel::matchBEXTRFromAnd by creating an ↵Craig Topper2018-02-125-38/+43
| | | | | | | | X86ISD::BEXTR node and calling Select. Add isel patterns to recognize this node. This removes a bunch of special case code for selecting the immediate and folding loads. llvm-svn: 324939
* [X86] Remove unused multiclass argument. NFCCraig Topper2018-02-121-3/+3
| | | | llvm-svn: 324938
* [GlobalMerge] Allow merging of dllexported variablesMartin Storsjo2018-02-121-3/+6
| | | | | | | | | If merging them, the dllexport attribute needs to be brought along to the new GlobalAlias. Differential Revision: https://reviews.llvm.org/D43192 llvm-svn: 324937
* Fix the syntax highlighting of strings in dwarfdump.Adrian Prantl2018-02-121-4/+4
| | | | llvm-svn: 324936
* Factor out common condition into an easier to understand helper function (NFC).Adrian Prantl2018-02-122-2/+12
| | | | llvm-svn: 324935
* Revert "[ThinLTO] Add GraphTraits for FunctionSummaries"Volodymyr Sapsai2018-02-123-32/+1
| | | | | | | | | It caused assertion failure Assertion failed: (!DD.IsLambda && !MergeDD.IsLambda && "faked up lambda definition?"), function MergeDefinitionData, file /Users/buildslave/jenkins/workspace/clang-stage1-configure-RA/llvm/tools/clang/lib/Serialization/ASTReaderDecl.cpp, line 1675. on the second stage build bots. llvm-svn: 324932
* [DebugInfo] Unify ChecksumKind and Checksum value in DIFileScott Linder2018-02-1210-74/+105
| | | | | | | | | Rather than encode the absence of a checksum with a Kind variant, instead put both the kind and value in a struct and wrap it in an Optional. Differential Revision: http://reviews.llvm.org/D43043 llvm-svn: 324928
* [InstCombine] X / (X * Y) --> 1.0 / YSanjay Patel2018-02-121-0/+10
| | | | | | | | | This is similar to the instsimplify fold added with D42385 ( rL323716 ) ...but this can't be in instsimplify because we're creating/morphing a different instruction. llvm-svn: 324927
* [InstCombine] various clean-ups for div transforms; NFCSanjay Patel2018-02-121-108/+94
| | | | llvm-svn: 324922
* [LICM] update BlockColors after splitting predecessorsJun Bum Lim2018-02-121-8/+23
| | | | | | | | | | Update BlockColors after splitting predecessors. Do not allow splitting EHPad for sinking when the BlockColors is not empty, so we can simply assign predecessor's color to the new block. Fixes PR36184 llvm-svn: 324916
* [AArch64] Fixes for ARMv8.2-A FP16 scalar intrinsic - llvm portionAbderrazek Zaafrani2018-02-121-0/+6
| | | | | | https://reviews.llvm.org/D42993 llvm-svn: 324912
* [X86] Add missing scheduling class tag for i64 absolute address movesSimon Pilgrim2018-02-121-5/+5
| | | | | | | | Expand existing SchedRW to encompass these like it did for the other memory offset movs - added comments to closing braces to keep track of def scopes. We only tagged it with the itinerary class, so completeness checks were erroneously passed (PR35639). llvm-svn: 324910
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