diff options
author | Craig Topper <craig.topper@intel.com> | 2018-02-12 21:18:09 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@intel.com> | 2018-02-12 21:18:09 +0000 |
commit | efe392351451853285eea864fb70a414bbd9612d (patch) | |
tree | 13518dc71bac7583ea804dcfe9ff45974c5f4560 /llvm/lib | |
parent | 9ca8b5718682b54cc9de5d215a590d54eb4dd4b0 (diff) | |
download | bcm5719-llvm-efe392351451853285eea864fb70a414bbd9612d.tar.gz bcm5719-llvm-efe392351451853285eea864fb70a414bbd9612d.zip |
[X86] Remove unused multiclass argument. NFC
llvm-svn: 324938
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 2200f9f4d66..f91db56e9ef 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -2536,7 +2536,7 @@ defm BEXTRI64 : tbm_ternary_imm_intr<0x10, GR64, "bextr{q}", i64mem, loadi64, multiclass tbm_binary_rm<bits<8> opc, Format FormReg, Format FormMem, RegisterClass RC, string OpcodeStr, - X86MemOperand x86memop, PatFrag ld_frag> { + X86MemOperand x86memop> { let hasSideEffects = 0 in { def rr : I<opc, FormReg, (outs RC:$dst), (ins RC:$src), !strconcat(OpcodeStr,"\t{$src, $dst|$dst, $src}"), @@ -2551,9 +2551,9 @@ let hasSideEffects = 0 in { multiclass tbm_binary_intr<bits<8> opc, string OpcodeStr, Format FormReg, Format FormMem> { defm NAME#32 : tbm_binary_rm<opc, FormReg, FormMem, GR32, OpcodeStr#"{l}", - i32mem, loadi32>; + i32mem>; defm NAME#64 : tbm_binary_rm<opc, FormReg, FormMem, GR64, OpcodeStr#"{q}", - i64mem, loadi64>, VEX_W; + i64mem>, VEX_W; } defm BLCFILL : tbm_binary_intr<0x01, "blcfill", MRM1r, MRM1m>; |