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* Use VLD1 in NEON extenting-load patterns instead of VLDR.Tim Northover2012-04-261-56/+59
* Test commit.Tim Northover2012-04-261-2/+0
* Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei...Craig Topper2012-04-262-13/+9
* Teach the reassociate pass to fold chains of multiplies with repeatedChandler Carruth2012-04-261-10/+247
* If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assumeEvan Cheng2012-04-263-7/+16
* Don't forget to reset 'first operand' flag when we're setting the MDNodeOpera...Bill Wendling2012-04-261-5/+8
* Print IV chain numbers while collecting them.Jakob Stoklund Olesen2012-04-251-4/+5
* Remove more dead code.Jakob Stoklund Olesen2012-04-251-3/+0
* Unify internal representation of ARM instructions with a register right-shift...Richard Barton2012-04-252-4/+10
* Remove the -disable-cross-class-join option.Jakob Stoklund Olesen2012-04-251-13/+4
* Cross-class joining is winning.Jakob Stoklund Olesen2012-04-251-66/+0
* Add ifdef around getSubtargetFeatureName in tablegen output file so that only...Craig Topper2012-04-251-0/+1
* Use vector_shuffles instead of target specific unpack nodes for AVX ZERO_EXTE...Craig Topper2012-04-251-18/+20
* Reverting r155468. Chris and Chandler have convinced me that it's dangerous andLang Hames2012-04-251-35/+0
* Do not use $gp as a dedicated global register if the target ABI is not O32. Akira Hatanaka2012-04-251-2/+2
* Simplify the known retain count tracking; use a boolean state insteadDan Gohman2012-04-251-41/+34
* Build custom predecessor and successor lists for each basic block.Dan Gohman2012-04-241-115/+101
* ARM: improved assembler diagnostics for missing CPU features.Jim Grosbach2012-04-242-23/+42
* Fix a naughty header include that breaks "installed" builds.Andrew Trick2012-04-241-2/+12
* ConstantFoldSelectInstruction swapped the operands of the select.Nadav Rotem2012-04-241-1/+1
* MachineBasicBlock::SplitCriticalEdge() should follow LLVM IR variant and refu...Evan Cheng2012-04-241-0/+5
* Add support for llvm.arm.neon.vmull* intrinsics to InstCombine. This fixesLang Hames2012-04-241-0/+35
* Fix a crash on valid (if UB) bitcode that is produced for some globalChandler Carruth2012-04-241-3/+11
* ARM: Nuke remnant bogus code.Jim Grosbach2012-04-241-2/+0
* AVX: Add additional vbroadcast replacement sequences for integers.Nadav Rotem2012-04-241-3/+30
* cmake: new fileAndrew Trick2012-04-241-0/+1
* misched: DAG builder must special case earlyclobberAndrew Trick2012-04-241-0/+9
* misched: try (not too hard) to place debug values where they belongAndrew Trick2012-04-241-0/+25
* misched: ignore debug values during schedulingAndrew Trick2012-04-241-6/+31
* misched: DAG builder support for tracking register pressure within the curren...Andrew Trick2012-04-242-5/+58
* RegisterPressure: A utility for computing register pressure within aAndrew Trick2012-04-242-0/+718
* AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8Nadav Rotem2012-04-241-6/+0
* Refactor Thumb ITState handling in ARM Disassembler to more efficiently use i...Richard Barton2012-04-241-31/+69
* AVX: We lower VECTOR_SHUFFLE and BUILD_VECTOR nodes into vbroadcast instructionsNadav Rotem2012-04-241-1/+42
* Look for the 'Is Simulated' module flag. This indicates that the program is c...Bill Wendling2012-04-241-4/+5
* Remove dangling spaces. Fix some other formatting.Craig Topper2012-04-241-8/+10
* Simplify code a bit and make it compile better. Remove unused parameters.Craig Topper2012-04-241-21/+10
* Add a missing cpu subtype.Evan Cheng2012-04-231-0/+4
* Tidy up. 80 columns, whitespace, et. al.Jim Grosbach2012-04-234-59/+65
* Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where th...Nadav Rotem2012-04-231-0/+56
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-2316-5/+54
* ARM: VSLI two-operand assmebly aliases are tblgen'erated.Jim Grosbach2012-04-231-19/+0
* ARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand aliases.Jim Grosbach2012-04-231-58/+4
* ARM: vqdmulh two-operand aliases are tblgen'erated now.Jim Grosbach2012-04-231-11/+0
* [Support/Unix] Unconditionally include time.h.Michael J. Spencer2012-04-231-8/+2
* Allow forward declarations to take a context. This helps the debuggerEric Christopher2012-04-231-7/+8
* Temporarily revert r155364 until the upstream review can complete, perChandler Carruth2012-04-231-36/+55
* Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth2012-04-2335-11849/+2126
* Hexagon V5 (floating point) support.Sirish Pande2012-04-2320-1463/+3374
* Support for Hexagon architectural feature, new value jump.Sirish Pande2012-04-238-5/+680
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