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* [PGO] Make indexed value profile data more compactXinliang David Li2015-11-103-84/+248
| | | | | | | | | | | | | | | | - Make indexed value profile data more compact by peeling out the per-site value count field into its own smaller sized array. - Introduced formal data structure definitions to specify value profile data layout in indexed format. Previously the layout of the data is only assumed in the client code (scattered in three different places : size computation, EmitData, and ReadData - The new data structure serves as a central place for layout documentation. - Add interfaces to force BE output for value profile data (testing purpose) - Add byte swap unit tests Differential Revision: http://reviews.llvm.org/D14401 llvm-svn: 252563
* [Hexagon] Fixing store instructions and reenabling a few more tests.Colin LeMahieu2015-11-102-25/+20
| | | | llvm-svn: 252561
* [ARM] Handle t2ADDri in ARMAsmPrinter::EmitUnwindingInstruction.Akira Hatanaka2015-11-101-0/+1
| | | | | | | | | | | | | This fixes a bug in ARMAsmPrinter::EmitUnwindingInstruction where llvm_unreachable was reached because t2ADDri wasn't handled. Test case provided by Tim Northover. rdar://problem/23270609 http://reviews.llvm.org/D14518 llvm-svn: 252557
* [Hexagon] Fixing load instruction parsing and reenabling tests.Colin LeMahieu2015-11-104-14/+16
| | | | llvm-svn: 252555
* MachineVerifier: Streamline live interval related error reportingMatthias Braun2015-11-091-90/+93
| | | | | | | | | Simply perform additional report_context() calls after a report() instead of adding more and more overloaded variations of report(). Also improve several instances where information was output in an ad-hoc way probably because no matching report() overload was available. llvm-svn: 252552
* MachineVerifier: Add missing linebreakMatthias Braun2015-11-091-0/+1
| | | | | | | MachineInstr::print() with SkipOppers==true does not produce a linebreak, so we have to do that in MachineVerifier::report(). llvm-svn: 252551
* MachineVerifier: MI::print has no TargetMachine overloadMatthias Braun2015-11-091-1/+1
| | | | | | | The code was passing a target machine pointer which degraded to a true operand to SkipOppers. llvm-svn: 252550
* MachineVerifier: print list of live intervals if availableMatthias Braun2015-11-091-1/+4
| | | | llvm-svn: 252549
* [WinEH] Remove isBarrier from instructions that do not returnReid Kleckner2015-11-091-2/+2
| | | | | | Fixes machine verification failures with David's latest EH change. llvm-svn: 252541
* add a SelectionDAG method to check if no common bits are set in two nodes; NFCISanjay Patel2015-11-093-33/+18
| | | | | | | | | | | | | | | This was suggested in: http://reviews.llvm.org/D13956 and is a follow-on to: http://reviews.llvm.org/rL252515 http://reviews.llvm.org/rL252519 This lets us remove logically equivalent/duplicated code from DAGCombiner and X86ISelDAGToDAG. A corresponding function for IR instructions already exists in ValueTracking. llvm-svn: 252539
* [TargetLibraryInfo] Add support for fls, flsl, flsll.Davide Italiano2015-11-091-0/+10
| | | | | | | | | This is a prerequisite for further optimisations of these functions, which will be commited as a separate patch. Differential Revision: http://reviews.llvm.org/D14219 llvm-svn: 252535
* [libFuzzer] make libFuzzer link if there is no sanitizer coverage ↵Kostya Serebryany2015-11-094-0/+50
| | | | | | instrumentation (it will fail at start-up time) llvm-svn: 252533
* Combine ifdefs around dl_iterate_phdr in Unix/Signals.incReid Kleckner2015-11-091-13/+8
| | | | | | | This avoids the need to have two dummy implementations of findModulesAndOffsets. llvm-svn: 252531
* [WinEH] Don't emit CATCHRET from visitCatchPadDavid Majnemer2015-11-094-22/+32
| | | | | | | Instead, emit a CATCHPAD node which will get selected to a target specific sequence. llvm-svn: 252528
* [x86] try harder to match bitwise 'or' into an LEASanjay Patel2015-11-091-11/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The motivation for this patch starts with the epic fail example in PR18007: https://llvm.org/bugs/show_bug.cgi?id=18007 ...unfortunately, this patch makes no difference for that case, but it solves some simpler cases. We'll get there some day. :) The current 'or' matching code was using computeKnownBits() via isBaseWithConstantOffset() -> MaskedValueIsZero(), but that's an unnecessarily limited use. We can do more by copying the logic in ValueTracking's haveNoCommonBitsSet(), so we can treat the 'or' as if it was an 'add'. There's a TODO comment here because we should lift the bit-checking logic into a helper function, so it's not duplicated in DAGCombiner. An example of the better LEA matching: leal (%rdi,%rdi), %eax andl $1, %esi orl %esi, %eax Becomes: andl $1, %esi leal (%rsi,%rdi,2), %eax Differential Revision: http://reviews.llvm.org/D13956 llvm-svn: 252515
* [Hexagon] Separating statement to match what clang-format would do.Colin LeMahieu2015-11-091-2/+4
| | | | llvm-svn: 252513
* [WinEH] Tweak funclet prologue/epilogue insertion to pass verifierReid Kleckner2015-11-092-6/+12
| | | | | | | | | | For some reason we'd never run MachineVerifier on WinEH code, and you explicitly have to ask for it with llc. I added it to a few test cases to get some coverage. Fixes PR25461. llvm-svn: 252512
* [WinEH] Re-committing r252249 (Clone funclets with multiple parents) with ↵Andrew Kaylor2015-11-091-34/+1005
| | | | | | | | additional fixes for determinism problems Differential Revision: http://reviews.llvm.org/D14454 llvm-svn: 252508
* [Hexagon] Fix -Wmicrosoft-enum-value warning with explicit enum typeReid Kleckner2015-11-091-1/+1
| | | | llvm-svn: 252505
* don't repeat function names in comments; NFCSanjay Patel2015-11-091-19/+17
| | | | llvm-svn: 252502
* Moving FileManager::removeDotPaths to llvm::sys::path::remove_dotsMike Aizatsky2015-11-091-0/+35
| | | | | | Differential Revision: http://reviews.llvm.org/D14393 llvm-svn: 252499
* [sanitizer] Use same shadow offset for ASAN on aarch64Adhemerval Zanella2015-11-091-15/+2
| | | | | | | | | This patch makes ASAN for aarch64 use the same shadow offset for all currently supported VMAs (39 and 42 bits). The shadow offset is the same for 39-bit (36). Similar to ppc64 port, aarch64 transformation also requires to use an add instead of 'or' for 42-bit VMA. llvm-svn: 252495
* Add discriminators for call instructions that are from the same line and ↵Dehao Chen2015-11-091-0/+32
| | | | | | | | | | | | | | same basic block. Summary: Call instructions that are from the same line and same basic block needs to have separate discriminators to distinguish between different callsites. Reviewers: davidxl, dnovillo, dblaikie Subscribers: dblaikie, probinson, llvm-commits Differential Revision: http://reviews.llvm.org/D14464 llvm-svn: 252492
* Simplify. NFC.Chad Rosier2015-11-091-4/+1
| | | | llvm-svn: 252491
* GlobalOpt should maintain externally_initialized when splitting aggregatesOliver Stannard2015-11-091-0/+2
| | | | | | | | | | | | | When GlobalOpt splits an internal, global variable with an aggregate type, it should propagate the externally_initialized flag to the newly created globals. This makes the pass safe for our downstream use of this flag, while still allowing some useful optimisations (such as removing dead parts of the split aggregate) to be performed. Differential Revision: http://reviews.llvm.org/D13382 llvm-svn: 252490
* [LoopVectorize] Address post-commit feedback on r250032James Molloy2015-11-092-22/+23
| | | | | | | | | | Implemented as many of Michael's suggestions as were possible: * clang-format the added code while it is still fresh. * tried to change Value* to Instruction* in many places in computeMinimumValueSizes - unfortunately there are several places where Constants need to be handled so this wasn't possible. * Reduce the pass list on loop-vectorization-factors.ll. * Fix a bug where we were querying MinBWs for I->getOperand(0) but using MinBWs[I]. llvm-svn: 252469
* Allow LLE/LD and the loop versioning infrastructure to use SCEV predicatesSilviu Baranga2015-11-093-28/+90
| | | | | | | | | | | | | | | | | | | Summary: LAA currently generates a set of SCEV predicates that must be checked by users. In the case of Loop Distribute/Loop Load Elimination, no such predicates could have been emitted, since we don't allow stride versioning. However, in the future there could be SCEV predicates that will need to be checked. This change adds support for SCEV predicate versioning in the Loop Distribute, Loop Load Eliminate and the loop versioning infrastructure. Reviewers: anemet Subscribers: mssimpso, sanjoy, llvm-commits Differential Revision: http://reviews.llvm.org/D14240 llvm-svn: 252467
* [AArch64] Add UABDL patterns for log2 shuffle.Charlie Turner2015-11-091-2/+34
| | | | | | | | | | | | | | | Summary: This matches the sum-of-absdiff patterns emitted by the vectoriser using log2 shuffles. Relies on D14207 to be able to match the `extract_subvector(..., 0)` Reviewers: t.p.northover, jmolloy Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D14208 llvm-svn: 252465
* [AArch64] Handle extract_subvector(..., 0) in ISel.Charlie Turner2015-11-092-18/+20
| | | | | | | | | | | | | | | Summary: Lowering this pattern early to an `EXTRACT_SUBREG` was making it impossible to match larger patterns in tblgen that use `extract_subvector(..., 0)` as part of the their input pattern. It seems like there will exist somewhere a better way of specifying this pattern over all relevant register value types, but I didn't manage to find it. Reviewers: t.p.northover, jmolloy Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D14207 llvm-svn: 252464
* [EABI] Add LLVM support for -meabi flagRenato Golin2015-11-093-8/+42
| | | | | | | | | | | | | | | | | | | | | "GCC requires the freestanding environment provide memcpy, memmove, memset and memcmp": https://gcc.gnu.org/onlinedocs/gcc-5.2.0/gcc/Standards.html Hence in GNUEABI targets LLVM should not convert 'memops' to their equivalent '__aeabi_memops'. This convertion violates GCC contract. The -meabi flag controls whether or not LLVM will modify 'memops' in GNUEABI targets. Without -meabi: use the triple default EABI. With -meabi=default: use the triple default EABI. With -meabi=gnu: use 'memops'. With -meabi=4 or -meabi=5: use '__aeabi_memops'. With -meabi set to an unknown value: same as -meabi=default. Patch by Vinicius Tinti. llvm-svn: 252462
* Revert "[ARM] Combine CMOV into BFI where possible"Renato Golin2015-11-092-116/+0
| | | | | | | This reverts commit r252057, as it broke ARM self-hosting buildbots, probably due to a code-gen fault. llvm-svn: 252460
* [CodeGen] Always promote f16 if not legalOliver Stannard2015-11-093-13/+30
| | | | | | | | | | | | | | | | | | | We don't currently have any runtime library functions for operations on f16 values (other than conversions to and from f32 and f64), so we should always promote it to f32, even if that is not a legal type. In that case, the f32 values would be softened to f32 library calls. SoftenFloatRes_FP_EXTEND now needs to check the promoted operand's type, as it may ne a no-op or require a different library call. getCopyFromParts and getCopyToParts now need to cope with a floating-point value stored in a larger integer part, as is the case for any target that needs to store an f16 value in a 32-bit integer register. Differential Revision: http://reviews.llvm.org/D12856 llvm-svn: 252459
* [Hexagon] Adding override to methods.Colin LeMahieu2015-11-091-4/+5
| | | | llvm-svn: 252453
* [Hexagon] Fixing warnings.Colin LeMahieu2015-11-091-4/+2
| | | | llvm-svn: 252448
* [Hexagon] Removing extra gen line.Colin LeMahieu2015-11-091-2/+1
| | | | llvm-svn: 252447
* [Hexagon] Maybe the makefile?Colin LeMahieu2015-11-091-2/+4
| | | | llvm-svn: 252446
* [Hexagon] Adding LLVMBuild.txt reference to HexagonAsmParser.Colin LeMahieu2015-11-091-0/+1
| | | | llvm-svn: 252444
* [Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction ↵Colin LeMahieu2015-11-0926-581/+4505
| | | | | | parsing tests. General updating of the code emission. llvm-svn: 252443
* Add a method to the BitcodeReader to parse only the identification blockMehdi Amini2015-11-092-0/+58
| | | | | | | | | | | Summary: Mimic parseTriple(); and exposes it to LTOModule.cpp Reviewers: dexonsmith, rafael Subscribers: llvm-commits From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 252442
* [AsmParser] Backends can parameterize ASM tokenization.Colin LeMahieu2015-11-095-0/+26
| | | | llvm-svn: 252439
* [AsmParser] Provide target direct access to mnemonic token. Allow ↵Colin LeMahieu2015-11-091-1/+5
| | | | | | | | assignment parsing to be hooked by target. Allow target to specify if identifier is a label. Differential Revision: http://reviews.llvm.org/D14255 llvm-svn: 252435
* [PGO] Instr func name var creation code refactoringXinliang David Li2015-11-091-0/+66
| | | | | | | Move the code from cfe to LLMV and become shared interfaces. There is no functional change. llvm-svn: 252433
* [AsmParser] Allow tokens to be put back in to the token stream.Colin LeMahieu2015-11-081-2/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D14252 llvm-svn: 252432
* [RuntimeDyld] Add support for R_X86_64_PC8 relocation.Maksim Panchenko2015-11-081-0/+8
| | | | llvm-svn: 252423
* Appease hosts without HAVE_BACKTRACE nor ENABLE_BACKTRACES.NAKAMURA Takumi2015-11-082-0/+11
| | | | | | | llvm/lib/Support/Signals.cpp:66:13: warning: unused function 'printSymbolizedStackTrace' [-Wunused-function] llvm/lib/Support/Signals.cpp:52:13: warning: function 'findModulesAndOffsets' has internal linkage but is not defined [-Wundefined-internal] llvm-svn: 252418
* [PowerPC] Fix LoopPreIncPrep not to depend on SCEV constant simplificationsHal Finkel2015-11-081-36/+78
| | | | | | | | | | | | | | | | | | | | | | | Under most circumstances, if SCEV can simplify X-Y to a constant, then it can also simplify Y-X to a constant. However, there is no guarantee that this is always true, and concensus is not to consider that a correctness bug in SCEV (although it is undesirable). PPCLoopPreIncPrep gathers pointers used to access memory (via loads, stores and prefetches) into buckets, where in each bucket the relative pointer offsets are constant. We used to keep each bucket as a multimap, where SCEV's subtraction operation was used to define the ordering predicate. Instead, use a fixed SCEV base expression for each bucket, record the constant offsets from that base expression, and adjust it later, if desirable, once all pointers have been collected. Doing it this way should be more compile-time efficient than the previous scheme (in addition to making the implementation less sensitive to SCEV simplification quirks). Fixes PR25170. llvm-svn: 252417
* [LoopStrengthReduce] Don't bother fixing up PHIs from EH Pad predsDavid Majnemer2015-11-081-0/+3
| | | | | | | | We cannot really insert fixup code into a PHI's predecessor. This fixes PR25445. llvm-svn: 252416
* [WinEH] Update PHIs of CATCHRET successorsDavid Majnemer2015-11-081-2/+2
| | | | | | | | | | | The TailDuplication machine pass ran across a malformed CFG: a PHI node referred it's predecessor's predecessor instead of it's predecessor. This occurred because we split the edge in X86ISelLowering when we processed the CATCHRET but forgot to do something about the PHI nodes. This fixes PR25444. llvm-svn: 252413
* Erase unused FunctionDIs variables after r252219.Yaron Keren2015-11-072-3/+0
| | | | llvm-svn: 252401
* [Bitcode] Add enums for call instruction markers and flags. NFC.Akira Hatanaka2015-11-072-8/+10
| | | | | | | | | | This commit adds enums in LLVMBitCodes.h to improve readability and maintainability. This is a follow-up to r252368 which was discussed here: http://reviews.llvm.org/D12923 llvm-svn: 252395
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