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* Remove use of removed function, llvm_stop_multithreadingDavid Blaikie2014-06-191-2/+0
| | | | llvm-svn: 211291
* Remove support for LLVM runtime multi-threading.Zachary Turner2014-06-192-28/+4
| | | | | | | | | | | | | After a number of previous small iterations, the functions llvm_start_multithreaded() and llvm_stop_multithreaded() have been reduced essentially to no-ops. This change removes them entirely. Reviewed by: rnk, dblaikie Differential Revision: http://reviews.llvm.org/D4216 llvm-svn: 211287
* DebugInfo: Fission: Ensure the address pool entries for location lists are ↵David Blaikie2014-06-191-1/+1
| | | | | | | | | emitted. The address pool was being emitted before location lists. The latter could add more entries to the pool which would be lost/never emitted. llvm-svn: 211284
* MCNullStreamer: assign file IDs to resolve crashes and errorsAlp Toker2014-06-191-9/+1
| | | | | | | | | | Use the MCStreamer base implementations for file ID tracking instead of overriding them as no-ops. Avoids assertions when streaming Dwarf debug info, and fixes ASM parsing of loc and file directives. llvm-svn: 211282
* [ValueTracking] Extend range metadata to call/invokeJingyue Wu2014-06-193-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: With this patch, range metadata can be added to call/invoke including IntrinsicInst. Previously, it could only be added to load. Rename computeKnownBitsLoad to computeKnownBitsFromRangeMetadata because range metadata is not only used by load. Update the language reference to reflect this change. Test Plan: Add several tests in range-2.ll to confirm the verifier is happy with having range metadata on call/invoke. Add two tests in AddOverFlow.ll to confirm annotating range metadata to call/invoke can benefit InstCombine. Reviewers: meheff, nlewycky, reames, hfinkel, eliben Reviewed By: eliben Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D4187 llvm-svn: 211281
* Kill the LLVM global lock.Zachary Turner2014-06-193-17/+22
| | | | | | | | | | | | | | This patch removes the LLVM global lock, and updates all existing users of the global lock to use their own mutex. None of the existing users of the global lock were protecting code that was mutually exclusive with any of the other users of the global lock, so its purpose was not being met. Reviewed by: rnk Differential Revision: http://reviews.llvm.org/D4142 llvm-svn: 211277
* Emit DWARF info for all code section in an assembly fileOliver Stannard2014-06-194-57/+189
| | | | | | | | Currently, when using llvm as an assembler, DWARF debug information is only generated for the .text section. This patch modifies this so that DWARF info is emitted for all executable sections. llvm-svn: 211273
* Emit DWARF3 call frame information when DWARF3+ debug info is requestedOliver Stannard2014-06-192-2/+14
| | | | | | | | | | | | | | | | Currently, llvm always emits a DWARF CIE with a version of 1, even when emitting DWARF 3 or 4, which both support CIE version 3. This patch makes it emit the newer CIE version when we are emitting DWARF 3 or 4. This will not reduce compatibility, as we already emit other DWARF3/4 features, and is worth doing as the DWARF3 spec removed some ambiguities in the interpretation of call frame information. It also fixes a minor bug where the "return address" field of the CIE was encoded as a ULEB128, which is only valid when the CIE version is 3. There are no test changes for this, because (as far as I can tell) none of the platforms that we test have a return address register with a DWARF register number >127. llvm-svn: 211272
* [mips] Implementation of dli.Matheus Almeida2014-06-192-7/+97
| | | | | | | | | | | Patch by David Chisnall His work was sponsored by: DARPA, AFRL Some small modifications to the original patch: we now error if it's not possible to expand an instruction (mips-expansions-bad.s has some examples). Added some comments to the expansions. llvm-svn: 211271
* [mips] Small update to the logic behind the expansion of assembly pseudo ↵Matheus Almeida2014-06-191-9/+20
| | | | | | | | | | | | | | | | instructions. Summary: The functions that do the expansion now return false on success and true otherwise. This is so we can catch some errors during the expansion (e.g.: immediate too large). The next patch adds some test cases. Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4214 llvm-svn: 211269
* Updated comments as suggested by Rafael. Thanks.Dinesh Dwivedi2014-06-191-1/+7
| | | | llvm-svn: 211268
* Added instruction combine to transform few more negative values addition to ↵Dinesh Dwivedi2014-06-191-0/+45
| | | | | | | | | | | | subtraction (Part 1) This patch enables transforms for following patterns. (x + (~(y & c) + 1) --> x - (y & c) (x + (~((y >> z) & c) + 1) --> x - ((y>>z) & c) Differential Revision: http://reviews.llvm.org/D3733 llvm-svn: 211266
* [X86] Teach how to combine horizontal binop even in the presence of undefs.Andrea Di Biagio2014-06-191-40/+115
| | | | | | | | | | | | | | Before this change, the backend was unable to fold a build_vector dag node with UNDEF operands into a single horizontal add/sub. This patch teaches how to combine a build_vector with UNDEF operands into a horizontal add/sub when possible. The algorithm conservatively avoids to combine a build_vector with only a single non-UNDEF operand. Added test haddsub-undef.ll to verify that we correctly fold horizontal binop even in the presence of UNDEFs. llvm-svn: 211265
* Refactored and updated SimplifyUsingDistributiveLaws() to Dinesh Dwivedi2014-06-192-105/+142
| | | | | | | | | | | | * Find factorization opportunities using identity values. * Find factorization opportunities by treating shl(X, C) as mul (X, shl(C)) * Keep NSW flag while simplifying instruction using factorization. This fixes PR19263. Differential Revision: http://reviews.llvm.org/D3799 llvm-svn: 211261
* CommandLine: bail out when options get multiply registeredAlp Toker2014-06-191-3/+13
| | | | | | | | | | These errors are strictly unrecoverable and indicate serious issues such as conflicting option names or an incorrectly linked LLVM distribution. With this change, the errors actually get detected so tests don't pass silently. llvm-svn: 211260
* InstCombine: Stop two transforms duelingDavid Majnemer2014-06-191-2/+5
| | | | | | | | | | | | | | | | | | | | | | InstCombineMulDivRem has: // Canonicalize (X+C1)*CI -> X*CI+C1*CI. InstCombineAddSub has: // W*X + Y*Z --> W * (X+Z) iff W == Y These two transforms could fight with each other if C1*CI would not fold away to something simpler than a ConstantExpr mul. The InstCombineMulDivRem transform only acted on ConstantInts until r199602 when it was changed to operate on all Constants in order to let it fire on ConstantVectors. To fix this, make this transform more careful by checking to see if we actually folded away C1*CI. This fixes PR20079. llvm-svn: 211258
* Move -dwarf-version to an MC level command line option so it'sEric Christopher2014-06-192-5/+3
| | | | | | | used by all of the MC level tools and codegen. Fix up all uses in the compiler to use this and set it on the context accordingly. llvm-svn: 211257
* Remove unnecessary include.Eric Christopher2014-06-191-1/+0
| | | | llvm-svn: 211256
* Convert some assert(0) to llvm_unreachable or fold an 'if' condition into ↵Craig Topper2014-06-1914-44/+22
| | | | | | the assert. llvm-svn: 211254
* Move optimization of some cases of (A & C1)|(B & C2) from instcombine to ↵Nick Lewycky2014-06-192-23/+32
| | | | | | instsimplify. Patch by Rahul Jain, plus some last minute changes by me -- you can blame me for any bugs. llvm-svn: 211252
* Make instsimplify's analysis of icmp eq/ne use computeKnownBits to determine ↵Nick Lewycky2014-06-191-0/+19
| | | | | | whether the icmp is always true or false. Patch by Suyog Sarda! llvm-svn: 211251
* Remove redundant code in InstCombineShift, no functionality change because ↵Nick Lewycky2014-06-191-5/+0
| | | | | | instsimplify already does this and instcombine calls instsimplify a few lines above. Patch by Suyog Sarda! llvm-svn: 211250
* MS asm: Properly handle quoted symbol namesDavid Majnemer2014-06-192-3/+17
| | | | | | | | | | | | | We would get confused by '@' characters in symbol names, we would mistake the text following them for the variant kind. When an identifier a string, the variant kind will never show up inside of it. Instead, check to see if there is a variant following the string. This fixes PR19965. llvm-svn: 211249
* R600/SI: Add intrinsics for various math instructions.Matt Arsenault2014-06-199-13/+127
| | | | | | | | These will be used for custom lowering and for library implementations of various math functions, so it's useful to expose these as builtins. llvm-svn: 211247
* Move ARMJITInfo off of the TargetMachine and down onto the subtarget.Eric Christopher2014-06-189-24/+28
| | | | | | | | | This required untangling a mess of headers that included around. This a recommit of r210953 with a fix for the removed accessor for JITInfo. llvm-svn: 211233
* Use stdint macros for specifying size of constantsMatt Arsenault2014-06-181-2/+3
| | | | llvm-svn: 211231
* Teach llvm-size to know about Mach-O universal files (aka fat files) andKevin Enderby2014-06-181-1/+1
| | | | | | | | | | fat files containing archives. Also fix a bug in MachOUniversalBinary::ObjectForArch::ObjectForArch() where it needed a >= when comparing the Index with the number of objects in a fat file. As the index starts at 0. llvm-svn: 211230
* R600: Handle fnearbyintMatt Arsenault2014-06-182-0/+13
| | | | | | | | The difference from rint isn't really relevant here, so treat them as equivalent. OpenCL doesn't have nearbyint, so this is sort of pointless other than for completeness. llvm-svn: 211229
* R600/SI: add gather4 and getlod intrinsics (v3)Marek Olsak2014-06-184-26/+175
| | | | | | | | | This contains all the previous patches + getlod support on top of it. It doesn't use SDNodes anymore, so it's quite small. It also adds v16i8 to SReg_128, which is used for the sampler descriptor. Reviewed-by: Tom Stellard llvm-svn: 211228
* Use LL suffix for literal that should be 64-bits.Matt Arsenault2014-06-181-1/+1
| | | | | | This hopefully fixes Windows llvm-svn: 211225
* MC: do not add comment string to the AsmToken in AsmLexer::LexLineCommentSaleem Abdulrasool2014-06-181-2/+2
| | | | | | | | Fixes macros with varargs if the macro instantiation has a trailing comment. Patch by Janne Grunau! llvm-svn: 211219
* MCAsmParser: full support for gas' '.if{cond} expression' directivesSaleem Abdulrasool2014-06-181-8/+41
| | | | | | Patch by Janne Grunau! llvm-svn: 211218
* Replace Execution Engine's mutex with std::recursive_mutex.Zachary Turner2014-06-184-57/+56
| | | | | | | | | | | | | This change has a bit of a trickle down effect due to the fact that there are a number of derived implementations of ExecutionEngine, and that the mutex is not tightly encapsulated so is used by other classes directly. Reviewed by: rnk Differential Revision: http://reviews.llvm.org/D4196 llvm-svn: 211214
* Revert a C API difference that I incorrectly introduced.Rafael Espindola2014-06-182-0/+5
| | | | | | | LLVMGetBitcodeModuleInContext should not take ownership on error. I will try to localize this odd api requirement, but this should get the bots green. llvm-svn: 211213
* Make getBaseObject static.Rafael Espindola2014-06-181-1/+1
| | | | | | Thanks to David Majnemer for noticing. llvm-svn: 211208
* Change IRObjectFile to parse the bitcode lazily.Rafael Espindola2014-06-181-2/+13
| | | | | | | The main point of this class is to provide a cheap object interface to a bitcode file, so it has to be as lazy as possible. llvm-svn: 211207
* Remove BitcodeReader::setBufferOwned.Rafael Espindola2014-06-182-22/+10
| | | | | | | | | | We do have use cases for the bitcode reader owning the buffer or not, but we always know which one we have when we construct it. It might be possible to simplify this further, but this is a step in the right direction. llvm-svn: 211205
* Simply test for available locations in optimization remarks.Diego Novillo2014-06-181-1/+1
| | | | | | | | | | | | | | | | | When emitting optimization remarks, we test for the presence of instruction locations by testing for a valid llvm.dbg.cu annotation. This is slightly inefficient because we can simply ask whether the debug location we have is known or not. Additionally, if my current plan works, I will need to remove the llvm.dbg.cu annotation from the IL (or prevent it from being generated) when -Rpass is used without -g. In those cases, we'll want to generate line tables but we will want to prevent code generation from emitting DWARF code for them. Tested on x86_64. llvm-svn: 211204
* [PowerPC] Remove unnecessary load of r12 in indirect callUlrich Weigand2014-06-181-4/+0
| | | | | | | | | | | | | | | When looking at the 64-bit SVR4 indirect call sequence, I noticed an unnecessary load of r12. And indeed the code says: // R12 must contain the address of an indirect callee. But this is not correct; in the 64-bit SVR4 (ELFv1) ABI, there is no need to load r12 at this point. It seems this code and comment is a remnant of code originally shared with the Darwin ABI ... This patch simply removes the unnecessary load. llvm-svn: 211203
* Run clang-format in a small chunk of code I am about to change.Rafael Espindola2014-06-181-13/+9
| | | | llvm-svn: 211201
* [ARM] [MC] Refactor the constant pool classesWeiming Zhao2014-06-183-136/+97
| | | | | | | | | | | ARMTargetStreamer implements ConstantPool and AssmeblerConstantPools to keep track of assembler-generated constant pools that are used for ldr-pseudo. When implementing ldr-pseudo for AArch64, these two classes can be reused. So this patch factors them out from ARM target to the general MC lib. llvm-svn: 211198
* R600: Expand vector fceilJan Vesely2014-06-181-0/+1
| | | | | | | | | Move fp64 fceil tests to fceil64.ll v2: rebase Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 211194
* [PowerPC] Simplify and improve loading into TOC registerUlrich Weigand2014-06-186-40/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During an indirect function call sequence on the 64-bit SVR4 ABI, generate code must load and then restore the TOC register. This does not use a regular LOAD instruction since the TOC register r2 is marked as reserved. Instead, the are two special instruction patterns: let RST = 2, DS = 2 in def LDinto_toc: DSForm_1a<58, 0, (outs), (ins g8rc:$reg), "ld 2, 8($reg)", IIC_LdStLD, [(PPCload_toc i64:$reg)]>, isPPC64; let RST = 2, DS = 10, RA = 1 in def LDtoc_restore : DSForm_1a<58, 0, (outs), (ins), "ld 2, 40(1)", IIC_LdStLD, [(PPCtoc_restore)]>, isPPC64; Note that these not only restrict the destination of the load to r2, but they also restrict the *source* of the load to particular address combinations. The latter is a problem when we want to support the ELFv2 ABI, since there the TOC save slot is no longer at 40(1). This patch replaces those two instructions with a single instruction pattern that only hard-codes r2 as destination, but supports generic addresses as source. This will allow supporting the ELFv2 ABI, and also helps generate more efficient code for calls to absolute addresses (allowing simplification of the ppc64-calls.ll test case). llvm-svn: 211193
* Work around ridiculous warning.Matt Arsenault2014-06-181-2/+5
| | | | | | Apparently C++ doesn't really have hex floating point constants. llvm-svn: 211192
* R600/SI: Add intrinsics for brev instructionsMatt Arsenault2014-06-186-1/+12
| | | | llvm-svn: 211187
* R600/SI: Prettier operand printing for 64-bit ops.Matt Arsenault2014-06-182-14/+17
| | | | | | Copy what is done for 32-bit already so the order is about the same. llvm-svn: 211186
* [mips] SYNC $stype instruction was added in Mips32Matheus Almeida2014-06-181-1/+7
| | | | | | but SYNC with an implied operand ($stype = 0) is valid since Mips2. llvm-svn: 211185
* Fix a memory leak in the error path.Rafael Espindola2014-06-181-2/+10
| | | | llvm-svn: 211184
* R600: Implement f64 ftrunc, ffloor and fceil.Matt Arsenault2014-06-182-0/+111
| | | | | | CI has instructions for these, so this fixes them for older hardware. llvm-svn: 211183
* R600: Custom lower f64 frint for pre-CIMatt Arsenault2014-06-182-0/+27
| | | | llvm-svn: 211182
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