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* add some long-overdue enums to refer to the parts of the 5-operandChris Lattner2010-07-086-44/+56
| | | | | | X86 memory operand. llvm-svn: 107925
* Relax assertion. In optimized code, it is possible that first instruction is ↵Devang Patel2010-07-081-1/+1
| | | | | | | | coming from a inlined function. This fixes PR7596 . llvm-svn: 107923
* Extension of r107506. Make sure that we don't mark a function as having a callBill Wendling2010-07-081-1/+2
| | | | | | if the inline ASM doesn't need a stack frame. llvm-svn: 107922
* Fix broken isCopy handling in TrimLiveIntervalToLastUseJakob Stoklund Olesen2010-07-081-3/+7
| | | | llvm-svn: 107921
* Remember the VR64 register classJakob Stoklund Olesen2010-07-081-0/+2
| | | | llvm-svn: 107920
* Fix decl/def debug info for template functions. Radar 8063111.Stuart Hastings2010-07-082-14/+12
| | | | llvm-svn: 107919
* Rework segment prefix emission code to handle segmentsChris Lattner2010-07-081-47/+41
| | | | | | | | | | | | in memory operands at the same type as hard coded segments. This fixes problems where we'd emit the segment override after the REX prefix on instructions like: mov %gs:(%rdi), %rax This fixes rdar://8127102. I have several cleanup patches coming next. llvm-svn: 107917
* introduce a new X86II::getMemoryOperandNo method, whichChris Lattner2010-07-081-12/+71
| | | | | | | | | returns the start of the memory operand for an instruction. Introduce a new "X86AddrSegment" enum to reduce # magic numbers referring to X86 memory operand layout. llvm-svn: 107916
* Switch SPU calling convention (function arguments) Kalle Raiskila2010-07-084-118/+52
| | | | | | to a Tablegen implementation. llvm-svn: 107913
* Revert some unneeded parts of the change in r107886 for theKevin Enderby2010-07-082-2/+0
| | | | | | | | | .weak_def_can_be_hidden directive. Chris pointed out that the MCAsmInfo.h/.cpp chunks aren't needed for this until the compiler starts generating these. And when that happens it will be more convenient for it to be a bool than a const char*. llvm-svn: 107906
* Check for FiniteOnlyFPMath as well.Evan Cheng2010-07-081-1/+1
| | | | llvm-svn: 107904
* Reuse DIEInteger for 1. This is frequently used while emitting an attribute ↵Devang Patel2010-07-082-1/+5
| | | | | | using dwarf::DW_FORM_flag form. llvm-svn: 107903
* Teach the x86 floating point stackifier to handle COPY instructions.Jakob Stoklund Olesen2010-07-081-1/+36
| | | | | | | | | | | This pass runs before COPY instructions are passed to copyPhysReg, so we simply translate COPY to the proper pseudo instruction. Note that copyPhysReg does not handle floating point stack copies. Once COPY is used everywhere, this can be cleaned up a bit, and most of the pseudo instructions can be removed. llvm-svn: 107899
* Implement X86InstrInfo::copyPhysRegJakob Stoklund Olesen2010-07-082-0/+64
| | | | llvm-svn: 107898
* The NEONPreAllocPass should never have to assign fixed registers anymore.Bob Wilson2010-07-081-34/+1
| | | | | | This pass can go away entirely soon. llvm-svn: 107892
* For big-endian systems, VLD2/VST2 with 32-bit vector elements will swap theBob Wilson2010-07-081-2/+2
| | | | | | | words within the 64-bit D registers. Use VLD1/VST1 with 64-bit elements instead. llvm-svn: 107890
* Added the darwin .weak_def_can_be_hidden directive.Kevin Enderby2010-07-085-0/+9
| | | | llvm-svn: 107886
* Clean up a comment.Bob Wilson2010-07-081-5/+5
| | | | llvm-svn: 107882
* Clean up scavengeRegister() a bit to prefer available regs, which allowsJim Grosbach2010-07-082-18/+7
| | | | | | | | the simplification of frame index register scavenging to not have to check for available registers directly and instead just let scavengeRegister() handle it. llvm-svn: 107880
* Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen2010-07-0816-123/+96
| | | | | | | | | EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. llvm-svn: 107879
* Remove references to INSERT_SUBREG after de-SSA.Jakob Stoklund Olesen2010-07-088-139/+15
| | | | | | | Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of INSERT_SUBREG. llvm-svn: 107878
* Merge the duplicated iabs optimization in DAGCombiner and let it detected a ↵Benjamin Kramer2010-07-081-30/+26
| | | | | | few more idioms. llvm-svn: 107868
* Teach instcombine to transformBenjamin Kramer2010-07-082-11/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | (X >s -1) ? C1 : C2 and (X <s 0) ? C2 : C1 into ((X >>s 31) & (C2 - C1)) + C1, avoiding the conditional. This optimization could be extended to take non-const C1 and C2 but we better stay conservative to avoid code size bloat for now. for int sel(int n) { return n >= 0 ? 60 : 100; } we now generate sarl $31, %edi andl $40, %edi leal 60(%rdi), %eax instead of testl %edi, %edi movl $60, %ecx movl $100, %eax cmovnsl %ecx, %eax llvm-svn: 107866
* A slight reworking of the custom patterns for x86-64 tpoff codegen andEric Christopher2010-07-081-9/+11
| | | | | | | | correct the testcase for valid assembly. Needs more tests. llvm-svn: 107860
* r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0.Evan Cheng2010-07-081-3/+5
| | | | llvm-svn: 107856
* Add TargetInstrInfo::copyPhysReg hook and use it from LowerSubregs.Jakob Stoklund Olesen2010-07-082-36/+25
| | | | | | | | | This target hook is intended to replace copyRegToReg entirely, but for now it calls copyRegToReg. Any remaining calls to copyRegToReg wil be replaced by COPY instructions. llvm-svn: 107854
* Optimize some vfp comparisons to integer ones. This patch implements the ↵Evan Cheng2010-07-082-10/+48
| | | | | | | | | | | | | | | | | | | | | | | | simplest case when the following conditions are met: 1. The arguments are f32. 2. The arguments are loads and they have no uses other than the comparison. 3. The comparison code is EQ or NE. e.g. vldr.32 s0, [r1] vldr.32 s1, [r0] vcmpe.f32 s1, s0 vmrs apsr_nzcv, fpscr beq LBB0_2 => ldr r1, [r1] ldr r0, [r0] cmp r0, r1 beq LBB0_2 More complicated cases will be implemented in subsequent patches. llvm-svn: 107852
* Changes to ARM tail calls, mostly cosmetic.Dale Johannesen2010-07-083-8/+20
| | | | | | | | | Add explicit testcases for tail calls within the same module. Duplicate some code to humor those who think .w doesn't apply on ARM. Leave this disabled on Thumb1, and add some comments explaining why it's hard and won't gain much. llvm-svn: 107851
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-0813-499/+331
| | | | | | Debug info intrinsics win for now. llvm-svn: 107850
* When processing frame index virtual registers, consider all available registersJim Grosbach2010-07-082-3/+23
| | | | | | | | (if there are any) and use the one which remains available for the longest rather than just using the first one. This should help enable better re-use of the loaded frame index values. rdar://7318760 llvm-svn: 107847
* Fix the second half of PR7437: scalarrepl wasn't preservingChris Lattner2010-07-081-21/+9
| | | | | | address spaces when SRoA'ing memcpy's. llvm-svn: 107846
* Don't forward-declare registers for static allocas, which we'llDan Gohman2010-07-071-1/+3
| | | | | | | prefer to materialize as local constants. This fixes the clang bootstrap abort. llvm-svn: 107840
* Fix -fast-isel-abort to check the right instruction.Dan Gohman2010-07-071-1/+1
| | | | llvm-svn: 107839
* use PrintEscapedString to handle attribute section with escapes in it,Chris Lattner2010-07-071-6/+11
| | | | | | | PR7399. The asm parser already handles this. This is of dubious utility (see the PR) but the asmprinter was clearly broken here. llvm-svn: 107834
* fix copies to/from GR8_ABCD_H even moreJakob Stoklund Olesen2010-07-071-1/+3
| | | | llvm-svn: 107832
* grammarJim Grosbach2010-07-071-1/+1
| | | | llvm-svn: 107831
* Handle cases where the post-RA scheduler may move instructions between theJim Grosbach2010-07-071-6/+21
| | | | | | | | | address calculation instructions leading up to a jump table when we're trying to convert them into a TB[H] instruction in Thumb2. This realistically shouldn't happen much, if at all, for well formed inputs, but it's more correct to handle it. rdar://7387682 llvm-svn: 107830
* finish up support for callw: PR7195Chris Lattner2010-07-072-1/+3
| | | | llvm-svn: 107826
* Implement the major chunk of PR7195: support for 'callw'Chris Lattner2010-07-076-11/+36
| | | | | | | in the integrated assembler. Still some discussion to be done. llvm-svn: 107825
* Add more assembly opcodes for SSE compare instructionsBruno Cardoso Lopes2010-07-071-8/+32
| | | | llvm-svn: 107823
* One MDNode may be used to create regular DIE as well as abstract DIE.Devang Patel2010-07-072-1/+17
| | | | | | Keep track of abstract subprogram DIEs. llvm-svn: 107822
* Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument ↵Evan Cheng2010-07-0712-79/+81
| | | | | | for consistency sake. llvm-svn: 107820
* Print undefined/unknown debug value as "undef".Devang Patel2010-07-071-1/+6
| | | | llvm-svn: 107818
* Not all custom inserters create new basic blocks. If the inserterDan Gohman2010-07-071-2/+5
| | | | | | didn't create a new block, don't reset the insert position. llvm-svn: 107813
* grammar and trailing whitespaceJim Grosbach2010-07-071-6/+6
| | | | llvm-svn: 107811
* Rename couple of maps.Devang Patel2010-07-071-11/+9
| | | | llvm-svn: 107810
* Allow copies between GR8_ABCD_L and GR8_ABCD_H.Jakob Stoklund Olesen2010-07-071-0/+3
| | | | | | This fixes PR7540. llvm-svn: 107809
* 80 cols.Devang Patel2010-07-071-12/+21
| | | | llvm-svn: 107807
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-076-99/+142
| | | | | | a separate DCE pass over MachineInstrs. llvm-svn: 107804
* Add X86FastISel support for return statements. This entails refactoringDan Gohman2010-07-078-91/+152
| | | | | | | a bunch of stuff, to allow the target-independent calling convention logic to be employed. llvm-svn: 107800
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