| Commit message (Collapse) | Author | Age | Files | Lines |
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and MMX should be left alone to be easily removed after moving to intrinsics
llvm-svn: 113247
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leave it for isel
llvm-svn: 113242
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GetMainExecutable yet.
llvm-svn: 113240
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llvm-svn: 113239
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llvm-svn: 113235
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Enable palignr intrinsic.
These may need adjustment for a new VT in due course.
llvm-svn: 113233
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llvm-svn: 113224
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llvm-svn: 113200
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teach LazyValueInfo to use them.
llvm-svn: 113196
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Switch from isWeakForLinker to mayBeOverridden which is more accurate.
Add more statistics and debugging info. Add comments. Move static function
outside anonymous namespace.
llvm-svn: 113190
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llvm-svn: 113189
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llvm-svn: 113188
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Fix zeroExtend and signExtend to support empty sets, and to return the smallest
possible result set which contains the extension of each element in their
inputs. For example zext i8 [100, 10) to i16 is now [0, 256), not i16 [100, 10)
which contains 63446 members.
llvm-svn: 113187
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always be disambiguated as sldtw. sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact. Force it to sldtw, resolving rdar://8017530
llvm-svn: 113186
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llvm-svn: 113184
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allowing unsigned 8-bit operands. This fixes rdar://8208481
llvm-svn: 113182
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of a mneumonic, report operand errors with better location
info. For example, we now report:
t.s:6:14: error: invalid operand for instruction
cwtl $1
^
but we fail for common cases like:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
because we don't know if this is supposed to be the reg/imm or imm/reg
form.
llvm-svn: 113178
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give a more detailed error. Before:
t.s:11:4: error: unrecognized instruction
addl $1, $1
^
t.s:12:4: error: unrecognized instruction
f2efqefa $1
^
After:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
f2efqefa $1
^
This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"
llvm-svn: 113176
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llvm-svn: 113167
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failed because a subtarget feature was not enabled. Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode. Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.
This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).
llvm-svn: 113166
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llvm-svn: 113165
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into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.
llvm-svn: 113163
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llvm-svn: 113158
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llvm-svn: 113157
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by Krister Wombell.
llvm-svn: 113155
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llvm-svn: 113147
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llvm-svn: 113146
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llvm-svn: 113144
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llvm-svn: 113135
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in the duplicated block instead of duplicating them.
Duplicating them into the end of the loop and the preheader
means that we got a phi node in the header of the loop,
which prevented LICM from hoisting them. GVN would
usually come around later and merge the duplicated
instructions so we'd get reasonable output... except that
anything dependent on the shoulda-been-hoisted value can't
be hoisted. In PR5319 (which this fixes), a memory value
didn't get promoted.
llvm-svn: 113134
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Loop::hasLoopInvariantOperands method. Remove
a useless and confusing Loop::isLoopInvariant(Instruction)
method, which didn't do what you thought it did.
No functionality change.
llvm-svn: 113133
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pattern, so there is no need to define a matching function.
llvm-svn: 113122
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llvm-svn: 113119
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llvm-svn: 113117
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llvm-svn: 113116
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llvm-svn: 113115
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llvm-svn: 113114
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llvm-svn: 113113
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llvm-svn: 113109
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llvm-svn: 113108
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llvm-svn: 113106
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This reduces malloc traffic (yay!) and removes MergeFunctionsEqualityInfo.
llvm-svn: 113105
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strong functions first to make sure they're the canonical definitions and then
do a second pass looking only for weak functions.
llvm-svn: 113104
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Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:
int foo(int x, int y, int z) {
return x+y+z;
}
used to compile into:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
movl 4(%rsp), %esi
addl %edx, %esi
movl (%rsp), %edx
addl %esi, %edx
movl %edx, %eax
addq $12, %rsp
ret
Now we produce:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
addl 4(%rsp), %edx ## Folded load
addl (%rsp), %edx ## Folded load
movl %edx, %eax
addq $12, %rsp
ret
Fewer instructions and less register use = faster compiles.
llvm-svn: 113102
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Clobber ranges are no longer used when joining physical registers.
Instead, all aliases are checked for interference.
llvm-svn: 113084
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llvm-svn: 113077
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llvm-svn: 113073
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not SelectAddr
llvm-svn: 113072
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regarding mmx shuffles
llvm-svn: 113059
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llvm-svn: 113058
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