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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2010-09-04 02:50:13 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2010-09-04 02:50:13 +0000
commit731bcc1abfe46547fe5c04364fc32dfec9c0e369 (patch)
treed01c5ec12de8575928ec45d80e551863f50b240d /llvm/lib
parent487e25010991791944833b35833f2b775b585edd (diff)
downloadbcm5719-llvm-731bcc1abfe46547fe5c04364fc32dfec9c0e369.tar.gz
bcm5719-llvm-731bcc1abfe46547fe5c04364fc32dfec9c0e369.zip
make explicit that we not handle several mmx shuffles
llvm-svn: 113058
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 45052da9915..147f201ac67 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -5467,19 +5467,19 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
SmallVector<int, 16> M;
SVOp->getMask(M);
- // Very little shuffling can be done for 64-bit vectors right now.
+ if (isPALIGNRMask(M, VT, HasSSSE3))
+ return getTargetShuffleNode(X86ISD::PALIGN, dl, VT, V1, V2,
+ X86::getShufflePALIGNRImmediate(SVOp),
+ DAG);
+
+ // MMX shuffles not already handled must be expanded.
if (VT.getSizeInBits() == 64)
- return isPALIGNRMask(M, VT, Subtarget->hasSSSE3()) ? Op : SDValue();
+ return SDValue();
// FIXME: pshufb, blends, shifts.
if (VT.getVectorNumElements() == 2)
return Op;
- if (isPALIGNRMask(M, VT, HasSSSE3))
- return getTargetShuffleNode(X86ISD::PALIGN, dl, VT, V1, V2,
- X86::getShufflePALIGNRImmediate(SVOp),
- DAG);
-
if (ShuffleVectorSDNode::isSplatMask(&M[0], VT) &&
SVOp->getSplatIndex() == 0 && V2IsUndef) {
if (VT == MVT::v2f64)
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