summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* [SDAG] Fix zeroExtend assertion errorNirav Dave2017-03-231-1/+2
| | | | | | | | | | | | | | | | | Move CombineTo preventing deleted node from being returned in visitZERO_EXTEND. Fixes PR32284. Reviewers: RKSimon, bogner Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31254 llvm-svn: 298604
* Do not set branch weight if the branch weight annotation is present.Dehao Chen2017-03-231-1/+5
| | | | | | | | | | | | | | Summary: ThinLTO will annotate the CFG twice. If the branch weight is set by the first annotation, we should not set the branch weight again in the second annotation because the first annotation is more accurate as there is less optimization that could affect debug info accuracy. Reviewers: tejohnson, davidxl Reviewed By: tejohnson Subscribers: mehdi_amini, aprantl, llvm-commits Differential Revision: https://reviews.llvm.org/D31228 llvm-svn: 298602
* X86FixupBWInsts: Minor cleanup. NFCZvi Rackover2017-03-231-35/+14
| | | | | | | | | | | | | | Summary: Cleanup some remnants of code from when the X86FixupBWInsts pass did both forward liveness analysis and backward liveness analysis. Reviewers: MatzeB, myatsina, DavidKreitzer Reviewed By: MatzeB Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31264 llvm-svn: 298599
* [Mips] Emit the correct DINS variantStrahinja Petrovic2017-03-231-8/+11
| | | | | | | | This patch fixes emitting of correct variant of DINS instruction. Differential Revision: https://reviews.llvm.org/D30988 llvm-svn: 298596
* [X86][SSE] Tidyup canWidenShuffleElements. NFCI.Simon Pilgrim2017-03-231-12/+13
| | | | | | Pull out mask elements at the start, allowing us to make the widening pattern matching more readable. llvm-svn: 298594
* [Mips] Fix for decoding DINS instruction - disassemblerStrahinja Petrovic2017-03-231-1/+8
| | | | | | | | | This patch fixes decoding of size and position for DINSM and DINSU instructions. Differential Revision: https://reviews.llvm.org/D31072 llvm-svn: 298593
* [GlobalISel][X86] clang-format. NFCIgor Breger2017-03-235-21/+18
| | | | llvm-svn: 298590
* [X86][TD][vpmovm2 ] New TD pattern for the vpmovm2 instructionMichael Zuckerman2017-03-232-22/+24
| | | | | | | | | | | Up until now, vpmovm2 instruction described its destination operand size by the source operand size. This patch adds new pattern for the vpmovm2 instruction. The node describes new expansion of the destination (from {128|256} to 512). Differential Revision: https://reviews.llvm.org/D30654 llvm-svn: 298586
* [ValueTracking] Use APInt::isNegative instead of using operator[BitWidth-1]. ↵Craig Topper2017-03-231-7/+7
| | | | | | NFCI llvm-svn: 298584
* [ValueTracking] Use setAllBits/setSignBit/setLowBits/setHighBits. NFCICraig Topper2017-03-231-20/+22
| | | | llvm-svn: 298583
* [IR] Use a binary search in DataLayout::getAlignmentInfoCraig Topper2017-03-231-58/+47
| | | | | | | | | | | | | | | | | | | | | Summary: We currently do a linear scan through all of the Alignments array entries anytime getAlignmentInfo is called. I noticed while profiling compile time on a -O2 opt run that this function can be called quite frequently and was showing about as about 1% of the time in callgrind. This patch puts the Alignments array into a sorted order by type and then by bitwidth. We can then do a binary search. And use the sorted nature to handle the special cases for INTEGER_ALIGN. Some of this is modeled after the sorting/searching we do for pointers already. This reduced the time spent in this routine by about 2/3 in the one compilation I was looking at. We could maybe improve this more by using a DenseMap to cache the results, but just sorting was easy and didn't require extra data structure. And I think it made the integer handling simpler. Reviewers: sanjoy, davide, majnemer, resistor, arsenm, mehdi_amini Reviewed By: arsenm Subscribers: arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D31232 llvm-svn: 298579
* [ARM] Reduce code duplication by factoring out in a lambda. NFCI.Davide Italiano2017-03-231-16/+11
| | | | llvm-svn: 298572
* [codeview] Move type index remapping logic to type mergerReid Kleckner2017-03-233-248/+219
| | | | | | | | | | | | | | | | | | | | | | Summary: This removes the 'remapTypeIndices' method on every TypeRecord class. My original idea was that this would be the beginning of some kind of generic entry point that would enumerate all of the TypeIndices inside of a TypeRecord, so that we could write generic graph algorithms for them without duplicating the knowledge of which fields are type index fields everywhere. This never happened, and nothing else uses this method. I need to change the API to deal with merging into IPI streams, so let's move it into the file that uses it first. Reviewers: zturner, ruiu Reviewed By: zturner, ruiu Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D31267 llvm-svn: 298564
* [AArch64] Drive-by cleanup, make this code shorter. NFCI.Davide Italiano2017-03-221-3/+1
| | | | llvm-svn: 298563
* Reapply r298417 "[ARM] Recommit the glueless lowering of addc/adde in Thumb1"Artyom Skrobov2017-03-223-31/+167
| | | | | | | | The UB in t2_so_imm_neg conversion has been addressed under D31242 / r298512 This reverts commit r298482. llvm-svn: 298562
* [AMDGPU] Do not emit isa info as code object metadataKonstantin Zhuravlyov2017-03-227-141/+20
| | | | | | | | - It was decided to expose this information through other means (rocr) Differential Revision: https://reviews.llvm.org/D30970 llvm-svn: 298560
* [ARM] simplifying t2_so_imm_neg as suggested by Eli Friedman in D31242 (NFC)Artyom Skrobov2017-03-221-5/+2
| | | | llvm-svn: 298559
* [AMDGPU] Emit kernel debug properties as code object metadataKonstantin Zhuravlyov2017-03-223-9/+110
| | | | | | Differential Revision: https://reviews.llvm.org/D30969 llvm-svn: 298558
* [AMDGPU] Emit kernel code properties as code object metadataKonstantin Zhuravlyov2017-03-227-45/+174
| | | | | | | | - These are not required for low level runtime Differential Revision: https://reviews.llvm.org/D29949 llvm-svn: 298556
* Clean up some Subtarget uses and casts in the X86 backend, removing ↵Eric Christopher2017-03-221-11/+5
| | | | | | unnecessary work or calls. llvm-svn: 298555
* [AMDGPU] Restructure code object metadata creationKonstantin Zhuravlyov2017-03-2213-883/+1134
| | | | | | | | | | | | | | | | | - Rename runtime metadata -> code object metadata - Make metadata not flow - Switch enums to use ScalarEnumerationTraits - Cleanup and move AMDGPUCodeObjectMetadata.h to AMDGPU/MCTargetDesc - Introduce in-memory representation for attributes - Code object metadata streamer - Create metadata for isa and printf during EmitStartOfAsmFile - Create metadata for kernel during EmitFunctionBodyStart - Finalize and emit metadata to .note during EmitEndOfAsmFile - Other minor improvements/bug fixes Differential Revision: https://reviews.llvm.org/D29948 llvm-svn: 298552
* [AMDGPU] Fix bug 31610Konstantin Zhuravlyov2017-03-222-7/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D31258 llvm-svn: 298551
* [libFuzzer] add two experimental flags to make corpus merging more scalable: ↵Kostya Serebryany2017-03-227-7/+109
| | | | | | -save_coverage_summary/-load_coverage_summary. This is still WIP, the documentation will come later if these flags survive llvm-svn: 298548
* [LVI] Add an LVI printer pass to capture test LVI cache after transformationsAnna Thomas2017-03-222-6/+97
| | | | | | | | | | | | | | | | | | | Summary: Adding a printer pass for printing the LVI cache values after transformations that use LVI. This will help us in identifying cases where LVI invariants are violated, or transforms that leave LVI in an incorrect state. Right now, I have added two test cases to show that the printer pass is working. I will be adding more test cases in a later change, once this change is checked in upstream. Reviewers: reames, dberlin, sanjoy, apilipenko Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30790 llvm-svn: 298542
* Preserve nonnull metadata on Loads through SROA & mem2reg.Luqman Aden2017-03-222-10/+51
| | | | | | | | | | | | | | | | | Summary: https://llvm.org/bugs/show_bug.cgi?id=31142 : SROA was dropping the nonnull metadata on loads from allocas that got optimized out. This patch simply preserves nonnull metadata on loads through SROA and mem2reg. Reviewers: chandlerc, efriedma Reviewed By: efriedma Subscribers: hfinkel, spatel, efriedma, arielb1, davide, llvm-commits Differential Revision: https://reviews.llvm.org/D27114 llvm-svn: 298540
* IPO: Const correctness for summaries passed into passes.Peter Collingbourne2017-03-224-66/+89
| | | | | | | | | Pass const qualified summaries into importers and unqualified summaries into exporters. This lets us const-qualify the summary argument to thinBackend. Differential Revision: https://reviews.llvm.org/D31230 llvm-svn: 298534
* IR: Fix a race condition in type id clients of ModuleSummaryIndex.Peter Collingbourne2017-03-222-10/+18
| | | | | | | | | Add a const version of the getTypeIdSummary accessor that avoids mutating the TypeIdMap. Differential Revision: https://reviews.llvm.org/D31226 llvm-svn: 298531
* Rename helper functions in DwarfExpression to be less misleading (NFC)Adrian Prantl2017-03-222-6/+6
| | | | llvm-svn: 298523
* [InstCombine] canonicalize insertelement of scalar constant ahead of ↵Sanjay Patel2017-03-221-0/+33
| | | | | | | | | | | | | | insertelement of variable insertelement (insertelement X, Y, IdxC1), ScalarC, IdxC2 --> insertelement (insertelement X, ScalarC, IdxC2), Y, IdxC1 As noted in the code comment and seen in the test changes, the motivation is that by pulling constant insertion up, we may be able to constant fold some insertelement instructions. Differential Revision: https://reviews.llvm.org/D31196 llvm-svn: 298520
* Fix PR32298 by adding an early exit to getFrameIndexExprs().Adrian Prantl2017-03-221-0/+6
| | | | | | | | Also add an assertion for the case that there are multiple FI expressions with a DW_OP_LLVM_fragment; which should violate internal constraints in DbgVariable. llvm-svn: 298518
* Make home_directory look in the password database in addition to $HOME.Zachary Turner2017-03-221-5/+11
| | | | | | | | | | | | | This is something of an edge case, but when the $HOME environment variable is not set, we can still look in the password database to get the current user's home directory. Added a test for this by getting the value of $HOME, then unsetting it, then calling home_directory() and verifying that it succeeds and that the value is the same as what we originally read from the environment. llvm-svn: 298513
* [ARM] t2_so_imm_neg had a subtle bug in the conversion, and could trigger UB ↵Artyom Skrobov2017-03-221-1/+3
| | | | | | | | | | | | | | by negating (int)-2147483648. By pure luck, none of the pre-existing tests triggered this; so I'm adding one. Summary: Thanks to Vitaly Buka for helping catch this. Reviewers: rengolin, jmolloy, efriedma, vitalybuka Subscribers: llvm-commits, aemerson Differential Revision: https://reviews.llvm.org/D31242 llvm-svn: 298512
* Add default typo to .tbss.*Rafael Espindola2017-03-221-0/+2
| | | | | | This matches gas behavior and is part of pr31888. llvm-svn: 298508
* Set the default type for .bss.foo.Rafael Espindola2017-03-221-0/+2
| | | | | | This matches gas and is part of pr31888. llvm-svn: 298506
* Produce INIT_ARRAY for sections named .init_array.*Rafael Espindola2017-03-221-1/+5
| | | | | | | These sections are merged together by the linker, so they should have the same time. llvm-svn: 298505
* [AMDGPU][MC] Fix for Bug 28204 + LIT testsDmitry Preobrazhensky2017-03-221-8/+22
| | | | | | | | | | Fixed v_mad_i64_i32/u64_u32 encoding Reviewers: artem.tamazov Differential Revision: https://reviews.llvm.org/D30828 llvm-svn: 298502
* r286814 resulted that CallPenalty can be subtracted twice:Evgeny Astigeevich2017-03-221-1/+1
| | | | | | | | | | | - First time, during calculation of the cost in InlineCost.cpp - Second time, during calculation of the cost in Inliner.cpp This patches fixes this. Differential Revision: https://reviews.llvm.org/D31137 llvm-svn: 298496
* [X86] Remove unnecessary duplicate code (PR30649). NFCI.Simon Pilgrim2017-03-221-5/+0
| | | | llvm-svn: 298495
* Revert "[ScalarEvolution] Predicate implication from operations"Max Kazantsev2017-03-221-147/+16
| | | | | | | | This reverts commit rL298481 Fails clang-with-lto-ubuntu build. llvm-svn: 298489
* [ValueTracking] Make sure we keep range metadata information when ↵Craig Topper2017-03-221-2/+2
| | | | | | calculating known bits for calls to bitreverse intrinsic. llvm-svn: 298488
* [ValueTracking] use setLowBits/setHighBits/setBitsFrom to replace |= ↵Craig Topper2017-03-221-16/+13
| | | | | | getHighBits/getLowBits. NFCI llvm-svn: 298486
* [X86] Remove an unused function from release builds. Reported by gccs unused ↵Craig Topper2017-03-221-0/+2
| | | | | | function warning. llvm-svn: 298485
* [SystemZ] Don't drop any operands in expandZExtPseudo()Jonas Paulsson2017-03-222-17/+26
| | | | | | | | Make sure that any operands, e.g. of an implicit def of a super reg is transferred to the new instruction. Review: Ulrich Weigand llvm-svn: 298484
* Revert "[ARM] Recommit the glueless lowering of addc/adde in Thumb1, ↵Vitaly Buka2017-03-223-167/+31
| | | | | | | | | | including the amended (no UB anymore) fix for adding/subtracting -2147483648." Fails check-llvm with ubsan This reverts commit r298417. llvm-svn: 298482
* [ScalarEvolution] Predicate implication from operationsMax Kazantsev2017-03-221-16/+147
| | | | | | | | | | | | | | | | | | | | | | | This patch allows SCEV predicate analysis to prove implication of some expression predicates from context predicates related to arguments of those expressions. It introduces three new rules: For addition: (A >X && B >= 0) || (B >= 0 && A > X) ===> (A + B) > X. For division: (A > X) && (0 < B <= X + 1) ===> (A / B > 0). (A > X) && (-B <= X < 0) ===> (A / B >= 0). Using these rules, SCEV is able to prove facts like "if X > 1 then X / 2 > 0". They can also be combined with the same context, to prove more complex expressions like "if X > 1 then X/2 + 1 > 1". Diffirential Revision: https://reviews.llvm.org/D30887 Reviewed by: sanjoy llvm-svn: 298481
* [InstCombine] Teach SimplifyDemandedUseBits to shrink Constants on the left ↵Craig Topper2017-03-221-1/+2
| | | | | | | | | | | | | | | | side of subtracts Summary: Subtracts can have constants on the left side, but we don't shrink them based on demanded bits. This patch fixes that to match the right hand side. Reviewers: davide, majnemer, spatel, sanjoy, hfinkel Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31119 llvm-svn: 298478
* [codeview] Use separate records for LF_SUBSTR_LIST and LF_ARGLISTReid Kleckner2017-03-224-0/+43
| | | | | | | They are structurally the same, but now we need to distinguish them because one record lives in the IPI stream and the other lives in TPI. llvm-svn: 298474
* [GlobalISel]: Create VREGs for ConstantInt argsAditya Nandakumar2017-03-221-4/+1
| | | | | | | | | | | | This patch changes the behavior of IRTranslating intrinsics where we now create VREG + G_CONSTANT for ConstantInt values. We already do this for FloatingPoint values. This makes it easier for the backends to select code and it won't have to de-duplicate creation+selection of constants. Reviewed by: ab llvm-svn: 298473
* Don't compose DWARF expressions with multiple subregisters.Adrian Prantl2017-03-221-0/+9
| | | | | | | | | If a register location can only be described by a complex expression (i.e., multiple subregisters) it doesn't safely compose with another complex expression. For example, it is not possible to apply a DW_OP_deref operation to multiple DW_OP_pieces. llvm-svn: 298472
* DwarfExpression: Defer emitting DWARF register operationsAdrian Prantl2017-03-222-47/+76
| | | | | | | | | | until the rest of the expression is known. This is still an NFC refactoring in preparation of a subsequent bugfix. This reapplies r298388 with a bugfix for non-physical frame registers. llvm-svn: 298471
OpenPOWER on IntegriCloud