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* Add a hasAddressTaken for BasicBlock.Dan Gohman2009-10-291-0/+9
| | | | llvm-svn: 85449
* Reimplement BranchFolding change to avoid tail merging for a 1 instructionBob Wilson2009-10-281-13/+15
| | | | | | | common tail, except when the OptimizeForSize function attribute is present. Radar 7338114. llvm-svn: 85441
* When we generate spill code, then decide we don't needDale Johannesen2009-10-281-1/+4
| | | | | | | | | | to spill after all, we weren't handling 2-instruction spill sequences correctly (PPC Altivec). We need to remove the store in this case. Removing the other instruction(s) would be goodness but is not needed for correctness, and isn't done here. 7331562. llvm-svn: 85437
* Make sure we return the right sized type here.Eric Christopher2009-10-281-2/+5
| | | | llvm-svn: 85436
* Revert r85346 change to control tail merging by CodeGenOpt::Level.Bob Wilson2009-10-285-25/+16
| | | | | | I'm going to redo this using the OptimizeForSize function attribute. llvm-svn: 85426
* Extend getMallocArraySize() to determine the array size if the malloc ↵Victor Hernandez2009-10-282-123/+105
| | | | | | | | | | | | | | argument is: ArraySize * ElementSize ElementSize * ArraySize ArraySize << log2(ElementSize) ElementSize << log2(ArraySize) Refactor isArrayMallocHelper and delete isSafeToGetMallocArraySize, so that there is only 1 copy of the malloc array determining logic. Update users of getMallocArraySize() to not bother calling isArrayMalloc() as well. llvm-svn: 85421
* Make AntiDepReg.h internal.David Goodwin2009-10-284-3/+65
| | | | llvm-svn: 85412
* Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate theBob Wilson2009-10-287-2/+17
| | | | | | | opcode and operand with a tab. Check for these instructions in the usual places. llvm-svn: 85411
* fconsts and fconstd are obviously re-materializable.Evan Cheng2009-10-281-0/+2
| | | | llvm-svn: 85410
* Cleanup now that frame index scavenging via post-pass is working for ARM and ↵Jim Grosbach2009-10-285-53/+4
| | | | | | Thumb2. llvm-svn: 85406
* llvm.dbg.global_variables do not exist anymore.Devang Patel2009-10-281-9/+0
| | | | llvm-svn: 85402
* add a new 'SetCurrentDebugType' API (requested by Andrew Haley for JITChris Lattner2009-10-281-0/+11
| | | | | | | stuff) to programmatically control the current debug flavor. While I'm at it, doxygenate Debug.h and clean it up. llvm-svn: 85395
* Don't call SDNode::isPredecessorOf when it isn't necessary. If the load'sDan Gohman2009-10-281-6/+10
| | | | | | chains have no users, they can't be predecessors of the condition. llvm-svn: 85394
* Simplify this code: if the unfolded load can't be hoisted, just deleteDan Gohman2009-10-281-16/+3
| | | | | | the new instructions and leave the old one in place. llvm-svn: 85393
* No newline at end of file.Edward O'Callaghan2009-10-281-1/+1
| | | | llvm-svn: 85390
* Update CMake file.Benjamin Kramer2009-10-281-0/+1
| | | | llvm-svn: 85389
* Treat lifetime begin/end markers as allocations/frees respectively for theOwen Anderson2009-10-283-3/+56
| | | | | | purposes for GVN/DSE. llvm-svn: 85383
* Add ABCD, a generalized implementation of the Elimination of Array BoundsNick Lewycky2009-10-281-0/+1108
| | | | | | | | Checks on Demand algorithm which looks at arbitrary branches instead of loop iterations. This is GSoC work by Andre Tavares with only editorial changes applied! llvm-svn: 85382
* Give ARMISD::EH_SJLJ_LONGJMP and EH_SJLJ_SETJMP names.Evan Cheng2009-10-281-0/+3
| | | | llvm-svn: 85381
* Be more careful about invariance reasoning on "store" queries. Stores still ↵Owen Anderson2009-10-281-6/+9
| | | | | | | | need to depend on Ref and ModRef calls within the invariant region. llvm-svn: 85380
* X86 palignr intrinsics immediate field is in bits. ISel must transform it ↵Evan Cheng2009-10-281-24/+29
| | | | | | into bytes. llvm-svn: 85379
* Add trivial support for the invariance intrinsics to memdep. This logic isOwen Anderson2009-10-281-1/+35
| | | | | | purely local for now. llvm-svn: 85378
* add bitcode reader support for blockaddress. We can now fullyChris Lattner2009-10-282-2/+45
| | | | | | | | | | round trip blockaddress through .ll and .bc files, so add a testcase. There are still a bunch of places in the optimizer and other places that need to be updated to work with these constructs, but at least the basics are in now. llvm-svn: 85377
* bitcode writer support for blockaddress.Chris Lattner2009-10-283-8/+52
| | | | llvm-svn: 85376
* Previously, all operands to Constant were themselves constant.Chris Lattner2009-10-285-28/+36
| | | | | | | | | In the new world order, BlockAddress can have a BasicBlock operand. This doesn't permute much, because if you have a ConstantExpr (or anything more specific than Constant) we still know the operand has to be a Constant. llvm-svn: 85375
* 'static const void *X = &&y' can only be put in the Chris Lattner2009-10-281-0/+3
| | | | | | | readonly section if a reference to the containing function is valid in the readonly section. llvm-svn: 85370
* Rewrite SelectionDAG::isPredecessorOf to be iterative instead ofDan Gohman2009-10-281-21/+16
| | | | | | | recursive to avoid consuming extraordinary amounts of stack space when processing tall graphs. llvm-svn: 85369
* full asmparser support for blockaddress. We can now do:Chris Lattner2009-10-284-40/+172
| | | | | | | | | $ llvm-as foo.ll -d -disable-output which reads and prints the .ll file. BC encoding is the next project. Testcase will go in once that works. llvm-svn: 85368
* asmprinter support for BlockAddress.Chris Lattner2009-10-281-0/+9
| | | | llvm-svn: 85367
* when we tear down a module, we need to be careful to Chris Lattner2009-10-281-1/+14
| | | | | | zap BlockAddress values. llvm-svn: 85366
* Teach MachineLICM to unfold loads from constant memory fromDan Gohman2009-10-281-17/+83
| | | | | | | otherwise unhoistable instructions in order to allow the loads to be hoisted. llvm-svn: 85364
* Use fconsts and fconstd to materialize small fp constants.Evan Cheng2009-10-285-6/+149
| | | | llvm-svn: 85362
* Add a second ValueType argument to isFPImmLegal.Evan Cheng2009-10-289-10/+14
| | | | llvm-svn: 85361
* Mark dead physregdefs dead immediately. This helps MachineSink andDan Gohman2009-10-281-0/+2
| | | | | | MachineLICM and other things which run before LiveVariables is run. llvm-svn: 85360
* Allow constants of different types to share constant pool entriesDan Gohman2009-10-281-3/+47
| | | | | | if they have compatible encodings. llvm-svn: 85359
* Remove getIEEEFloatParts and getIEEEDoubleParts. They are not needed.Evan Cheng2009-10-281-50/+0
| | | | llvm-svn: 85358
* Update SystemZ to use PSW following the way x86 uses EFLAGS. BesidesDan Gohman2009-10-283-30/+36
| | | | | | | | | | | eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen change. This unfortunately requires SystemZ to switch to the list-burr scheduler, in order to handle the physreg defs properly, however that's what LLVM has available at this time. llvm-svn: 85357
* Add an indirect branch pattern for ARM. Testcase will be coming soon.Bob Wilson2009-10-281-0/+10
| | | | llvm-svn: 85355
* rename indbr -> indirectbr to appease the residents of #llvm.Chris Lattner2009-10-2815-49/+51
| | | | llvm-svn: 85351
* IR support for the new BlockAddress constant kind. This isChris Lattner2009-10-282-6/+74
| | | | | | | untested and there is no way to use it, next up: doing battle with asmparser. llvm-svn: 85349
* Record CodeGen optimization level in the BranchFolding pass so that we canBob Wilson2009-10-275-16/+25
| | | | | | | | | | | | | | | | use it to control tail merging when there is a tradeoff between performance and code size. When there is only 1 instruction in the common tail, we have been merging. That can be good for code size but is a definite loss for performance. Now we will avoid tail merging in that case when the optimization level is "Aggressive", i.e., "-O3". Radar 7338114. Since the IfConversion pass invokes BranchFolding, it too needs to know the optimization level. Note that I removed the RegisterPass instantiation for IfConversion because it required a default constructor. If someone wants to keep that for some reason, we can add a default constructor with a hard-wired optimization level. llvm-svn: 85346
* Rename lib/VMCore/ConstantsContext.h:ValueMap<> to ConstantUniqueMap<> to avoidJeffrey Yasskin2009-10-272-17/+17
| | | | | | colliding with llvm/ADT/ValueMap.h:ValueMap<>. llvm-svn: 85344
* Add new note.Bill Wendling2009-10-271-0/+35
| | | | llvm-svn: 85341
* Fixed a bug in the coalescer where intervals were occasionally merged ↵Lang Hames2009-10-272-2/+22
| | | | | | despite a real interference. This fixes rdar://problem/7157961. llvm-svn: 85338
* Enable virtual register based frame index scavenging by default for ARM & T2.Jim Grosbach2009-10-271-2/+2
| | | | llvm-svn: 85335
* Move and clarify note.Bill Wendling2009-10-272-31/+33
| | | | llvm-svn: 85334
* Infrastructure for dynamic stack realignment on ARM. For now, this is off byJim Grosbach2009-10-272-2/+76
| | | | | | | default behind a command line option. This will enable better performance for vectors on NEON enabled processors. llvm-svn: 85333
* Note corrected.Bill Wendling2009-10-271-3/+5
| | | | llvm-svn: 85332
* Modify note.Bill Wendling2009-10-271-0/+8
| | | | llvm-svn: 85331
* Add a note.Bill Wendling2009-10-271-0/+23
| | | | llvm-svn: 85329
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