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authorBob Wilson <bob.wilson@apple.com>2009-10-28 00:37:03 +0000
committerBob Wilson <bob.wilson@apple.com>2009-10-28 00:37:03 +0000
commite4b80c9bee36b860690df22d63ec2d394495dbc9 (patch)
treed32232cac6f7db09588a13db5de6e8c32beff287 /llvm/lib
parent375faa8dd7c45df30c66246405de1406afc62df2 (diff)
downloadbcm5719-llvm-e4b80c9bee36b860690df22d63ec2d394495dbc9.tar.gz
bcm5719-llvm-e4b80c9bee36b860690df22d63ec2d394495dbc9.zip
Add an indirect branch pattern for ARM. Testcase will be coming soon.
llvm-svn: 85355
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td10
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 3bbf6aee481..c044f717f39 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -657,6 +657,16 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1 in
let Inst{27-20} = 0b00010010;
}
+// Indirect branches
+let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
+ def BRIND : AXI<(outs), (ins GPR:$dst), BrMiscFrm, IIC_Br, "bx $dst",
+ [(brind GPR:$dst)]> {
+ let Inst{7-4} = 0b0001;
+ let Inst{19-8} = 0b111111111111;
+ let Inst{27-20} = 0b00010010;
+ }
+}
+
// FIXME: remove when we have a way to marking a MI with these properties.
// FIXME: Should pc be an implicit operand like PICADD, etc?
let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
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