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* Revert "Signal handling should be signal-safe"JF Bastien2018-05-163-199/+87
| | | | | | Some bots don't have double-pointer width compare-and-exchange. Revert for now.q llvm-svn: 332429
* Signal handling should be signal-safeJF Bastien2018-05-163-87/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Before this patch, signal handling wasn't signal safe. This leads to real-world crashes. It used ManagedStatic inside of signals, this can allocate and can lead to unexpected state when a signal occurs during llvm_shutdown (because llvm_shutdown destroys the ManagedStatic). It also used cl::opt without custom backing storage. Some de-allocation was performed as well. Acquiring a lock in a signal handler is also a great way to deadlock. We can't just disable signals on llvm_shutdown because the signals might do useful work during that shutdown. We also can't just disable llvm_shutdown for programs (instead of library uses of clang) because we'd have to then mark the pointers as not leaked and make sure all the ManagedStatic uses are OK to leak and remain so. Move all of the code to lock-free datastructures instead, and avoid having any of them in an inconsistent state. I'm not trying to be fancy, I'm not using any explicit memory order because this code isn't hot. The only purpose of the atomics is to guarantee that a signal firing on the same or a different thread doesn't see an inconsistent state and crash. In some cases we might miss some state (for example, we might fail to delete a temporary file), but that's fine. Note that I haven't touched any of the backtrace support despite it not technically being totally signal-safe. When that code is called we know something bad is up and we don't expect to continue execution, so calling something that e.g. sets errno is the least of our problems. A similar patch should be applied to lib/Support/Windows/Signals.inc, but that can be done separately. <rdar://problem/28010281> Reviewers: dexonsmith Subscribers: aheejin, llvm-commits Differential Revision: https://reviews.llvm.org/D46858 llvm-svn: 332428
* [DebugInfo] Only handle DBG_VALUE in InlineSpiller.Shiva Chen2018-05-161-2/+8
| | | | | | | | | | | | | The instructions using registers should be DBG_VALUE and normal instructions. Use isDebugValue() to filter out DBG_VALUE and add an assert to ensure there is no other kind of debug instructions using the registers. Differential Revision: https://reviews.llvm.org/D46739 Patch by Hsiangkai Wang. llvm-svn: 332427
* Fix LSR compile time hang.Evgeny Stupachenko2018-05-161-1/+6
| | | | | | | | | | | | | Summary: Limit number of reassociations in GenerateReassociationsImpl. Reviewers: qcolombet, mkazantsev Differential Revision: https://reviews.llvm.org/D46039 From: Evgeny Stupachenko <evstupac@gmail.com> <evgeny.v.stupachenko@intel.com> llvm-svn: 332426
* ARM: Remove unnecessary argument. NFCI.Peter Collingbourne2018-05-162-6/+3
| | | | | | IsLittleEndian is already a field of ARMAsmBackend. llvm-svn: 332420
* ARM: Deduplicate code and remove unnecessary declaration. NFCI.Peter Collingbourne2018-05-163-47/+11
| | | | llvm-svn: 332419
* [MachineOutliner] Add optsize markings to outlined functions.Eli Friedman2018-05-151-0/+8
| | | | | | | | | It doesn't matter much this late in the pipeline, but one place that does check for it is the function alignment code. Differential Revision: https://reviews.llvm.org/D46373 llvm-svn: 332415
* [AMDGPU] Fix handling of void types in isLegalAddressingModeStanislav Mekhanoshin2018-05-151-1/+1
| | | | | | | | | | | | | It is legal for the type passed to isLegalAddressingMode to be unsized or, more specifically, VoidTy. In this case, we must check the legality of load / stores for all legal types. Directly trying to call getTypeStoreSize is incorrect, and leads to breakage in e.g. Loop Strength Reduction. This change guards against that behaviour. Differential Revision: https://reviews.llvm.org/D40405 llvm-svn: 332409
* [InstCombine] fix binop (shuffle X), C --> shuffle (binop X, C') to check usesSanjay Patel2018-05-151-1/+1
| | | | llvm-svn: 332407
* [WebAssembly] Provide WasmFunction content offset information.Sam Clegg2018-05-151-0/+1
| | | | | | | | | | | | | WasmObjectWriter mostly operates with function segments offsets that do not include their size fields. WasmObjectFile needs to have and provide this information to the lld to maintain proper R_WEBASSEMBLY_FUNCTION_OFFSET_I32 relocations entries. Patch by Yury Delendik Differential Revision: https://reviews.llvm.org/D46763 llvm-svn: 332406
* StructurizeCFG: fix inverting conditionsMarek Olsak2018-05-151-2/+3
| | | | | | | | | | | | | | | | Author: Samuel Pitoiset Without this patch, it appears to me that we are selecting the wrong operand when inverting conditions. In the attached test, it will select %tmp3 instead of %tmp4. To fix it, just use 'A' as everywhere. This fixes a regression introduced by "[PatternMatch] define m_Not using m_Xor and cst_pred_ty" https://reviews.llvm.org/D46351 llvm-svn: 332403
* [msan] Instrument masked.store, masked.load intrinsics.Evgeniy Stepanov2018-05-151-0/+87
| | | | | | | | | | | | Summary: Instrument masked store/load intrinsics. Reviewers: kcc Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D46785 llvm-svn: 332402
* Move helper classes into anonymous namespaces. NFCI.Benjamin Kramer2018-05-152-3/+5
| | | | llvm-svn: 332400
* [InstCombine] clean up code for binop-shuffle transforms; NFCISanjay Patel2018-05-151-39/+34
| | | | llvm-svn: 332399
* [AArch64] Improve single vector lane unscaled storesEvandro Menezes2018-05-151-0/+16
| | | | | | | | | | When storing the 0th lane of a vector, use a simpler and usually more efficient scalar store instead. In this case, also using the unscaled offset. Differential revision: https://reviews.llvm.org/D46762 llvm-svn: 332394
* [DAGCombine] Move load checks on store of loads into candidateNirav Dave2018-05-151-15/+13
| | | | | | | | | | search. NFCI. Migrate single-use and non-volatility, non-indexed requirements on stores of immediate store values to candidate collection pass from later stage. llvm-svn: 332392
* Nios2: Unbreak build.Peter Collingbourne2018-05-152-5/+6
| | | | llvm-svn: 332391
* [x86][eflags] Fix PR37431 by teaching the EFLAGS copy lowering toChandler Carruth2018-05-151-3/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specially handle SETB_C* pseudo instructions. Summary: While the logic here is somewhat similar to the arithmetic lowering, it is different enough that it made sense to have its own function. I actually tried a bunch of different optimizations here and none worked well so I gave up and just always do the arithmetic based lowering. Looking at code from the PR test case, we actually pessimize a bunch of code when generating these. Because SETB_C* pseudo instructions clobber EFLAGS, we end up creating a bunch of copies of EFLAGS to feed multiple SETB_C* pseudos from a single set of EFLAGS. This in turn causes the lowering code to ruin all the clever code generation that SETB_C* was hoping to achieve. None of this is needed. Whenever we're generating multiple SETB_C* instructions from a single set of EFLAGS we should instead generate a single maximally wide one and extract subregs for all the different desired widths. That would result in substantially better code generation. But this patch doesn't attempt to address that. The test case from the PR is included as well as more directed testing of the specific lowering pattern used for these pseudos. Reviewers: craig.topper Subscribers: sanjoy, mcrosier, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D46799 llvm-svn: 332389
* AMDGPU: Fix v_dot{4, 8}* instruction encodingKonstantin Zhuravlyov2018-05-152-8/+13
| | | | | | Differential Revision: https://reviews.llvm.org/D46848 llvm-svn: 332387
* [MemorySSA] Don't sort IDF blocks.Michael Zolotukhin2018-05-151-11/+2
| | | | | | | | | | | | | | | | Summary: After r332167 we started to sort the IDF blocks inside IDF calculation, so there is no need to re-sort them on the user site. The test changes are due to a slightly different order we're using now (originally we used DFSInNumber and now the blocks are sorted by a pair (LevelFromRoot, DFSInNumber)). Reviewers: dberlin, mgrang Subscribers: Prazek, hiraditya, george.burgess.iv, llvm-commits Differential Revision: https://reviews.llvm.org/D46899 llvm-svn: 332385
* AMDGPU/GlobalISel: Implement select() for G_FCONSTANTTom Stellard2018-05-151-15/+47
| | | | | | | | | | | | Summary: Also clean up G_CONSTANT selection. Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D46170 llvm-svn: 332379
* AMDGPU: Add disasm tests for deep learning instructions + fix v_fmac_f32 disasmKonstantin Zhuravlyov2018-05-151-1/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D46853 llvm-svn: 332377
* [X86] Split WriteCvtF2F into F32->F64 and F64->F32 scheduler classesSimon Pilgrim2018-05-1512-136/+181
| | | | | | | | BtVer2 - Fixes schedules for (V)CVTPS2PD instructions A lot of the Intel models still have too many InstRW overrides for these new classes - this needs cleaning up but I wanted to get the classes in first llvm-svn: 332376
* [InstCombine] fix binop-of-shuffles to check usesSanjay Patel2018-05-151-12/+10
| | | | llvm-svn: 332375
* [Hexagon] Remove unused function from subtargetKrzysztof Parzyszek2018-05-151-8/+0
| | | | llvm-svn: 332369
* [Hexagon] Remove unused flag from subtarget and (non)corresponding testKrzysztof Parzyszek2018-05-153-8/+0
| | | | llvm-svn: 332365
* [mips] Mark select instructions correctlySimon Dardis2018-05-153-151/+192
| | | | | | | | Reviewers: atanasyan, abeserminji, smaksimovic Differential Revision: https://reviews.llvm.org/D46702 llvm-svn: 332364
* [DAG] propagate FMF for all FPMathOperatorsSanjay Patel2018-05-152-12/+29
| | | | | | | | | | | | | | | | | This is a simple hack based on what's proposed in D37686, but we can extend it if needed in follow-ups. It gets us most of the FMF functionality that we want without adding any state bits to the flags. It also intentionally leaves out non-FMF flags (nsw, etc) to minimize the patch. It should provide a superset of the functionality from D46563 - the extra tests show propagation and codegen diffs for fcmp, vecreduce, and FP libcalls. The PPC log2() test shows the limits of this most basic approach - we only applied 'afn' to the last node created for the call. AFAIK, there aren't any libcall optimizations based on the flags currently, so that shouldn't make any difference. Differential Revision: https://reviews.llvm.org/D46854 llvm-svn: 332358
* [X86] Split off F16C WriteCvtPH2PS/WriteCvtPS2PH scheduler classesSimon Pilgrim2018-05-1512-139/+121
| | | | | | | | | Btver2 - VCVTPH2PSYrm needs to double pump the AGU Broadwell - missing VCVTPS2PH*mr stores extra latency Allows us to remove the WriteCvtF2FSt conversion store class llvm-svn: 332357
* Reapply "DWARFVerifier: Check "completeness" of .debug_names section"Pavel Labath2018-05-152-2/+176
| | | | | | | | | This is a resubmit of r331868 (D46583), which was reverted due to failures on the PS4 bot. These have been resolved with r332246/D46748. llvm-svn: 332349
* [MergeFunctions] Fix merging of small weak functionswhitequark2018-05-151-35/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | When two interposable functions are merged, we cannot replace uses and have to emit calls to a common internal function. However, writeThunk() will not actually emit a thunk if the function is too small. This leaves us in a broken state where mergeTwoFunctions already rewired the functions, but writeThunk doesn't do anything. This patch changes the implementation so that: * writeThunk() does just that. * The direct replacement of calls is moved into mergeTwoFunctions() into the non-interposable case only. * isThunkProfitable() is extracted and will be called for the non-iterposable case always, and in the interposable case only if uses are still left after replacement. This issue has been introduced in https://reviews.llvm.org/D34806, where the code for checking thunk profitability has been moved. Differential Revision: https://reviews.llvm.org/D46804 Reviewed By: whitequark llvm-svn: 332342
* [mips] Fix formatting of floating point conversion patternsSimon Dardis2018-05-151-8/+8
| | | | llvm-svn: 332341
* [mips] Add disassembly support for comparison instructionsSimon Dardis2018-05-151-4/+6
| | | | llvm-svn: 332340
* [mips] Fix predicates of mfc1, mtc1 instructionsSimon Dardis2018-05-152-28/+22
| | | | | | | | Reviewers: atanasyan, abeserminji, smaksimovic Differential Revision: https://reviews.llvm.org/D46692 llvm-svn: 332339
* [X86] Improve unsigned saturation downconvert detection.Artur Gainullin2018-05-151-19/+52
| | | | | | | | | | | | | | | | | | | | | | | Summary: New unsigned saturation downconvert patterns detection was implemented in X86 Codegen: (truncate (smin (smax (x, C1), C2)) to dest_type), where C1 >= 0 and C2 is unsigned max of destination type. (truncate (smax (smin (x, C2), C1)) to dest_type) where C1 >= 0, C2 is unsigned max of destination type and C1 <= C2. These two patterns are equivalent to: (truncate (umin (smax(x, C1), unsigned_max_of_dest_type)) to dest_type) Reviewers: RKSimon Subscribers: llvm-commits, a.elovikov Differential Revision: https://reviews.llvm.org/D45315 llvm-svn: 332336
* [NFC] pull a function into its own lambdaJF Bastien2018-05-151-19/+21
| | | | | | | | | As requested in D46858, pulling this function into its own lambda makes it easier to read that part of the code and reason as to what's going on because the scope it can be called from is extremely limited. We want to keep it as a function because it's called from the two subsequent lines. llvm-svn: 332325
* [NFC] Update commentsJF Bastien2018-05-152-31/+30
| | | | | | Don't prepend function or data name before each comment. Split into its own NFC patch as requested in D46858. llvm-svn: 332323
* [RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker ↵Shiva Chen2018-05-153-0/+14
| | | | | | | | | | | | | | relaxation 1. Deine FeatureRelax to enable/disable linker relaxation. 2. Define shouldForceRelocation to preserve relocation types even if the fixup can be resolved when linker relaxation enabled. This is necessary for correctness as offsets may change during relaxation. Differential Revision: https://reviews.llvm.org/D46674 llvm-svn: 332318
* [NFC] Add const to method signatureMax Kazantsev2018-05-151-1/+1
| | | | llvm-svn: 332317
* [Debugify] Add -debugify-each for testing each pass in a pipelineVedant Kumar2018-05-151-0/+8
| | | | | | | | | | | | | | | | This adds a -debugify-each mode to opt which, when enabled, wraps each {Module,Function}Pass in a pipeline with logic to add, check, and strip synthetic debug info for testing purposes. This mode can be used to test complex pipelines for debug info bugs, or to collect statistics about the number of debug values & locations lost throughout various stages of a pipeline. Patch by Son Tuan Vu! Differential Revision: https://reviews.llvm.org/D46525 llvm-svn: 332312
* [CommandLine] Error message for incorrect PositionalEatArgs usageKeno Fischer2018-05-141-9/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: bugpoint has several options specified as `PositionalEatArgs` to pass options through to the underlying tool, e.g. `-tool-args`. The `-help` message suggests the usage is: `-tool-args=<string>`. However, this is misleading, because that's not how these arguments work. Rather than taking a value, the option consumes all positional arguments until the next recognized option (or all arguments if `--` is specified at some point). To make this slightly clearer, instead print the help as: ``` -tool-args <string>... - <tool arguments>... ``` Additionally, add an error if the user attempts to use a `PositionalEatArgs` argument with a value, instead of silently ignoring it. Example: ``` ./bin/bugpoint -tool-args=-mpcu=skylake-avx512 bugpoint: for the -tool-args option: This argument does not take a value. Instead, it consumes any positional arguments until the next recognized option. ``` Reviewed By: aprantl Differential Revision: https://reviews.llvm.org/D46787 llvm-svn: 332311
* [WebAssembly] Move toString helpers to BinaryFormatSam Clegg2018-05-144-29/+38
| | | | | | | | Subscribers: dschuff, mgorny, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46847 llvm-svn: 332305
* Revert "[Option] Fix PR37006 prefix choice in findNearest"Brian Gesiak2018-05-141-24/+24
| | | | | | | | | | | Summary: This revision causes build failures in PS4 and ppc64le buildbots (for example, http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/29988). I'll revert for now and try to diagnose the issue. Test Plan: check-llvm check-clang llvm-svn: 332304
* [InstCombine] fix crash due to ignored addrspacecastKeno Fischer2018-05-141-2/+3
| | | | | | | | | | | | | | | | | | Summary: Part of the InstCombine code for simplifying GEPs looks through addrspacecasts. However, this was done by updating a variable also used by the next transformation, for marking GEPs as inbounds. This led to replacing a GEP with a similar instruction in a different addrspace, which caused an assertion failure in RAUW. This caused julia issue https://github.com/JuliaLang/julia/issues/27055 Patch by Jeff Bezanson <jeff@juliacomputing.com> Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D46722 llvm-svn: 332302
* [Option] Fix PR37006 prefix choice in findNearestBrian Gesiak2018-05-141-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | Summary: In https://bugs.llvm.org/show_bug.cgi?id=37006 Nico Weber points out a flaw in `OptTable::findNearest`: if an option "foo"'s prefixes are "--" and "-", then the nearest option for "--fob" will be "-foo". This is incorrect, however, since the function is expected to return "--foo". The bug is due to a naive loop that attempts to predetermines which prefix is best. Instead, compute the edit distance for each prefix/name pair. Test Plan: `check-llvm` Reviewers: thakis Reviewed By: thakis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46776 llvm-svn: 332299
* [ARM] Back up R4 and LR if calling the stack probe functionMartin Storsjo2018-05-141-0/+11
| | | | | | Differential Revision: https://reviews.llvm.org/D46777 llvm-svn: 332298
* [CodeView] Improve debugging of virtual base class member variablesBrock Wyma2018-05-142-3/+6
| | | | | | | | Initial support for passing the virtual base pointer offset to CodeViewDebug. https://reviews.llvm.org/D46271 llvm-svn: 332296
* [Hexagon] Add a target feature to control using small data sectionKrzysztof Parzyszek2018-05-144-16/+20
| | | | llvm-svn: 332292
* [Hexagon] Add a target feature for generating new-value storesKrzysztof Parzyszek2018-05-143-6/+18
| | | | llvm-svn: 332290
* [DWARF] Factor out a DWARFUnitHeader class. NFCPaul Robinson2018-05-143-56/+44
| | | | | | | | | | | Extract information related to a "unit header" from DWARFUnit into a new DWARFUnitHeader class, and add a DWARFUnit member for the header. This is one step in the direction of allowing type units in the .debug_info section for DWARF v5. Differential Revision: https://reviews.llvm.org/D46707 llvm-svn: 332289
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