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author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2018-05-15 19:32:47 +0000 |
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committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2018-05-15 19:32:47 +0000 |
commit | f13c9969fc099abe3b539714d69ab01028637c29 (patch) | |
tree | 8b147933a4570137d065682218a3df62f6bae698 /llvm/lib | |
parent | e241ce6f65f1c6373886a6c7f505fc59d0bf244d (diff) | |
download | bcm5719-llvm-f13c9969fc099abe3b539714d69ab01028637c29.tar.gz bcm5719-llvm-f13c9969fc099abe3b539714d69ab01028637c29.zip |
AMDGPU: Fix v_dot{4, 8}* instruction encoding
Differential Revision: https://reviews.llvm.org/D46848
llvm-svn: 332387
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/AMDGPU/VOP3Instructions.td | 13 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 8 |
2 files changed, 13 insertions, 8 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td index 922187c1d12..ca043404f62 100644 --- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td @@ -153,19 +153,24 @@ class getVOP3VCC<VOPProfile P, SDPatternOperator node> { (i1 VCC)))]; } -class VOP3Features<bit Clamp, bit OpSel> { +class VOP3Features<bit Clamp, bit OpSel, bit Packed> { bit HasClamp = Clamp; bit HasOpSel = OpSel; + bit IsPacked = Packed; } -def VOP3_REGULAR : VOP3Features<0, 0>; -def VOP3_CLAMP : VOP3Features<1, 0>; -def VOP3_OPSEL : VOP3Features<1, 1>; +def VOP3_REGULAR : VOP3Features<0, 0, 0>; +def VOP3_CLAMP : VOP3Features<1, 0, 0>; +def VOP3_OPSEL : VOP3Features<1, 1, 0>; +def VOP3_PACKED : VOP3Features<1, 1, 1>; class VOP3_Profile<VOPProfile P, VOP3Features Features = VOP3_REGULAR> : VOPProfile<P.ArgVT> { let HasClamp = !if(Features.HasClamp, 1, P.HasClamp); let HasOpSel = !if(Features.HasOpSel, 1, P.HasOpSel); + let IsPacked = !if(Features.IsPacked, 1, P.IsPacked); + + let HasModifiers = !if(Features.IsPacked, 1, P.HasModifiers); // FIXME: Hack to stop printing _e64 let Outs64 = (outs DstRC.RegClass:$vdst); diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td index 3127532a8e0..8e2eff13d6d 100644 --- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td @@ -170,10 +170,10 @@ let SubtargetPredicate = HasDLInsts in { def V_DOT2_F32_F16 : VOP3PInst<"v_dot2_f32_f16", VOP3_Profile<VOP_F32_V2F16_V2F16_F32>, int_amdgcn_fdot2>; def V_DOT2_I32_I16 : VOP3PInst<"v_dot2_i32_i16", VOP3_Profile<VOP_I32_V2I16_V2I16_I32>, int_amdgcn_sdot2>; def V_DOT2_U32_U16 : VOP3PInst<"v_dot2_u32_u16", VOP3_Profile<VOP_I32_V2I16_V2I16_I32>, int_amdgcn_udot2>; -def V_DOT4_I32_I8 : VOP3Inst<"v_dot4_i32_i8", VOP3_Profile<VOP_I32_I32_I32_I32>, int_amdgcn_sdot4>; -def V_DOT4_U32_U8 : VOP3Inst<"v_dot4_u32_u8", VOP3_Profile<VOP_I32_I32_I32_I32>, int_amdgcn_udot4>; -def V_DOT8_I32_I4 : VOP3Inst<"v_dot8_i32_i4", VOP3_Profile<VOP_I32_I32_I32_I32>, int_amdgcn_sdot8>; -def V_DOT8_U32_U4 : VOP3Inst<"v_dot8_u32_u4", VOP3_Profile<VOP_I32_I32_I32_I32>, int_amdgcn_udot8>; +def V_DOT4_I32_I8 : VOP3PInst<"v_dot4_i32_i8", VOP3_Profile<VOP_I32_I32_I32_I32, VOP3_PACKED>, int_amdgcn_sdot4>; +def V_DOT4_U32_U8 : VOP3PInst<"v_dot4_u32_u8", VOP3_Profile<VOP_I32_I32_I32_I32, VOP3_PACKED>, int_amdgcn_udot4>; +def V_DOT8_I32_I4 : VOP3PInst<"v_dot8_i32_i4", VOP3_Profile<VOP_I32_I32_I32_I32, VOP3_PACKED>, int_amdgcn_sdot8>; +def V_DOT8_U32_U4 : VOP3PInst<"v_dot8_u32_u4", VOP3_Profile<VOP_I32_I32_I32_I32, VOP3_PACKED>, int_amdgcn_udot8>; } // End SubtargetPredicate = HasDLInsts |