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* [codeview] Remove redundant TypeTable lookupReid Kleckner2016-08-301-17/+1
| | | | | | | | As written, the code should assert if this lookup would have ever succeeded. Without looking through composite types, the type graph should be acyclic. llvm-svn: 280168
* Next set of additional error checks for invalid Mach-O files for bad ↵Kevin Enderby2016-08-301-6/+99
| | | | | | | | LC_DYSYMTAB’s. This contains the missing checks for LC_DYSYMTAB load command fields. llvm-svn: 280161
* GlobalISel: combine extracts & sequences created for legalizationTim Northover2016-08-302-0/+83
| | | | | | | | Legalization ends up creating many G_SEQUENCE/G_EXTRACT pairs which leads to inefficient codegen (even for -O0), so add a quick pass over the function to remove them again. llvm-svn: 280155
* AMDGPU: Relax SGPR asm constraint register classMatt Arsenault2016-08-301-1/+1
| | | | | | | s should be SReg_32 to be as general as possible. This can avoid a copy from m0. llvm-svn: 280154
* [libfuzzer] simplified unit truncation; do not write trunc items to discMike Aizatsky2016-08-302-34/+14
| | | | | | Differential Revision: https://reviews.llvm.org/D24049 llvm-svn: 280153
* [LoopVectorizer] Predicate instructions in blocks with several incoming edgesMichael Kuperstein2016-08-301-12/+4
| | | | | | | | | | We don't need to limit predication to blocks that have a single incoming edge, we just need to use the right mask. This fixes PR30172. Differential Revision: https://reviews.llvm.org/D24009 llvm-svn: 280148
* [COFFObjectFile] Ignore broken symbol tableDavid Majnemer2016-08-301-2/+6
| | | | | | | | | | | | | | | | When binaries are compressed by UPX, information about symbol table offset and symbol count remain unchanged (but became invalid due to compression). This causes failure in the constructor and the rest of the binary cannot be processed. Instead, reset symbol related information (symbol/string table pointers, sizes) - this should disable the related iterators and functions while the rest of the binary can still be processed. Patch by Bandzi Michal! llvm-svn: 280147
* CodeGen: Fixup for r280128, since GCC isn't as permissive as ClangDuncan P. N. Exon Smith2016-08-301-5/+3
| | | | | | | Fixes the bots, e.g.: http://lab.llvm.org:8011/builders/lldb-x86_64-ubuntu-14.04-buildserver/builds/10055 llvm-svn: 280135
* GlobalISel: forbid physical registers on generic MIs.Tim Northover2016-08-301-0/+8
| | | | | | | | | | We're intending to move to a world where the type of a register is determined by its (unique) def. This is incompatible with physregs, which are untyped. It also means the other passes don't have to worry quite so much about register-class compatibility and inserting COPYs appropriately. llvm-svn: 280132
* ADT: Split ilist_node_traits into alloc and callback, NFCDuncan P. N. Exon Smith2016-08-304-20/+14
| | | | | | | | | | | | | | | | Many lists want to override only allocation semantics, or callbacks for iplist. Split these up to prevent code duplication. - Specialize ilist_alloc_traits to change the implementations of deleteNode() and createNode(). - One common desire is to do nothing deleteNode() and disable createNode(). Specialize ilist_alloc_traits to inherit from ilist_noalloc_traits for that behaviour. - Specialize ilist_callback_traits to use the addNodeToList(), removeNodeFromList(), and transferNodesFromList() callbacks. As a drive-by, add some coverage to the callback-related unit tests. llvm-svn: 280128
* TailDuplication: Extract Indirect-Branch block limit as option. NFCKyle Butt2016-08-301-3/+9
| | | | | | | | The existing code hard-coded a limit of 20 instructions for duplication when a block ended with an indirect branch. Extract this as an option. No functional change intended. llvm-svn: 280125
* ADT: Guarantee transferNodesFromList is only called on transfersDuncan P. N. Exon Smith2016-08-302-4/+3
| | | | | | | | | | | | Guarantee that ilist_traits<T>::transferNodesFromList is only called when nodes are actually changing lists. I also moved all the callbacks to occur *first*, before the operation. This is the only choice for iplist<T>::merge, so we might as well be consistent. I expect this to have no effect in practice, although it simplifies the logic in both iplist<T>::transfer and iplist<T>::insert. llvm-svn: 280122
* [InstCombine] replace divide-by-constant checks with asserts; NFCSanjay Patel2016-08-301-19/+16
| | | | | | | These folds already have tests for scalar and vector types, except for the vector div-by-0 case, so I'm adding tests for that. llvm-svn: 280115
* [InstCombine] clean up foldICmpDivConstant; NFCISanjay Patel2016-08-301-16/+20
| | | | | | | | 1. Fix comments to match variable names 2. Remove redundant CmpRHS variable 3. Add FIXME to replace some checks with asserts llvm-svn: 280112
* Fixup r279618, instantiate ↵NAKAMURA Takumi2016-08-301-2/+2
| | | | | | | | | | | *AnalysisManagerProxy<*AnalysisManager,LazyCallGraph::SCC>, instead of *AnalysisManagerProxy<*AnalysisManager,LazyCallGraph::SCC,LazyCallGraph&>, for PassID. Or they were not instantiated as expected; llvm::InnerAnalysisManagerProxy<llvm::AnalysisManager<llvm::Function>, llvm::LazyCallGraph::SCC>::PassID llvm::InnerAnalysisManagerProxy<llvm::AnalysisManager<llvm::Function>, llvm::LazyCallGraph::SCC>::PassID llvm-svn: 280105
* [AMDGPU] Refactor SOP instructions TD files.Valery Pykhtin2016-08-304-914/+1105
| | | | | | Differential revision: https://reviews.llvm.org/D23617 llvm-svn: 280101
* [libFuzzer] fix a bug when running a single unit of N bytes with -max_len=M, ↵Kostya Serebryany2016-08-302-6/+7
| | | | | | M<N, caused a buffer overflow llvm-svn: 280098
* [libFuzzer] stop using bits for memcmp's value profile -- seems to blow up ↵Kostya Serebryany2016-08-302-9/+9
| | | | | | the corpus too much llvm-svn: 280096
* [MC] Move parser helper functions from Asmparser to MCAsmParserNirav Dave2016-08-302-65/+69
| | | | | | NFC Intended. llvm-svn: 280092
* [Reassociate] Add additional debug output. NFC.Chad Rosier2016-08-301-0/+2
| | | | llvm-svn: 280090
* SILoadStoreOptimizer.cpp: Fix a warning in r279991. [-Wunused-variable]NAKAMURA Takumi2016-08-301-0/+1
| | | | llvm-svn: 280075
* [SimplifyCFG] Properly CSE metadata in SinkThenElseCodeToEndJames Molloy2016-08-301-0/+5
| | | | | | This was missing, meaning the metadata in sunk instructions was potentially bogus and could cause miscompiles. llvm-svn: 280072
* Replace incorrect "#ifdef DEBUG" with "#ifndef NDEBUG".James Y Knight2016-08-301-11/+15
| | | | | | | | | | | | | | | | | | | | The former is simply wrong -- the code will either never be used or will always be used, rather than being dependent upon whether it's built with debug assertions enabled. The macro DEBUG isn't ever set by the llvm build system. But, the macro DEBUG(X) is defined (unconditionally) if you happen to include llvm/Support/Debug.h. The code in Value.h which was erroneously protected by the #ifdef DEBUG didn't even compile -- you can't cast<> from an LLVMOpaqueValue directly. Fortunately, it was never invoked, as Core.cpp included Value.h before Debug.h. The conditionalized code in AArch64CollectLOH.cpp was previously always used, as it includes Debug.h. llvm-svn: 280056
* [libFuzzer] use bits instead of bytes for memcmp/strcmp value profile -- the ↵Kostya Serebryany2016-08-302-13/+21
| | | | | | fuzzer reaches the goal much faster, at least on the simple puzzles llvm-svn: 280054
* [RewriteStatepointsForGC] Update comment for same PHI node check. NFCAnna Thomas2016-08-301-1/+2
| | | | llvm-svn: 280052
* [PowerPC] Force entry alignment in .got2Hal Finkel2016-08-301-2/+4
| | | | | | | | | Implement Bill's suggested fix for 32-bit targets for PR22711 (for the alignment of each entry). As pointed out in the bug report, we could just force the section alignment, since we only add pointer-sized things currently, but this fix is somewhat more future-proof. llvm-svn: 280049
* Fix coding style; NFCSanjoy Das2016-08-301-4/+2
| | | | | | Avoid variables starting with lowercase. llvm-svn: 280048
* [libFuzzer] use trace-div and trace-gep for guided fuzzing, add testsKostya Serebryany2016-08-304-1/+66
| | | | llvm-svn: 280046
* [sanitizer-coverage] add two more modes of instrumentation: trace-div and ↵Kostya Serebryany2016-08-301-6/+75
| | | | | | trace-gep, mostly usaful for value-profile-based fuzzing; llvm part llvm-svn: 280043
* [PowerPC] Add support for -mlongcallHal Finkel2016-08-304-1/+15
| | | | | | | | | | | The "long call" option forces the use of the indirect calling sequence for all calls (even those that don't really need it). GCC provides this option; This is helpful, under certain circumstances, for building very-large binaries, and some other specialized use cases. Fixes PR19098. llvm-svn: 280040
* NFC: add early exit in ModuleSummaryAnalysisPiotr Padlewski2016-08-301-29/+32
| | | | | | | | | | | | | | | | Summary: Changed this code because it was not very readable. The one question that I got after changing it is, should we count calls to intrinsics? We don't add them to caller summary, so maybe we shouldn't also count them? Reviewers: tejohnson, eraman, mehdi_amini Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23949 llvm-svn: 280036
* ADT: Give ilist<T>::reverse_iterator a handle to the current nodeDuncan P. N. Exon Smith2016-08-306-21/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reverse iterators to doubly-linked lists can be simpler (and cheaper) than std::reverse_iterator. Make it so. In particular, change ilist<T>::reverse_iterator so that it is *never* invalidated unless the node it references is deleted. This matches the guarantees of ilist<T>::iterator. (Note: MachineBasicBlock::iterator is *not* an ilist iterator, but a MachineInstrBundleIterator<MachineInstr>. This commit does not change MachineBasicBlock::reverse_iterator, but it does update MachineBasicBlock::reverse_instr_iterator. See note at end of commit message for details on bundle iterators.) Given the list (with the Sentinel showing twice for simplicity): [Sentinel] <-> A <-> B <-> [Sentinel] the following is now true: 1. begin() represents A. 2. begin() holds the pointer for A. 3. end() represents [Sentinel]. 4. end() holds the poitner for [Sentinel]. 5. rbegin() represents B. 6. rbegin() holds the pointer for B. 7. rend() represents [Sentinel]. 8. rend() holds the pointer for [Sentinel]. The changes are #6 and #8. Here are some properties from the old scheme (which used std::reverse_iterator): - rbegin() held the pointer for [Sentinel] and rend() held the pointer for A; - operator*() cost two dereferences instead of one; - converting from a valid iterator to its valid reverse_iterator involved a confusing increment; and - "RI++->erase()" left RI invalid. The unintuitive replacement was "RI->erase(), RE = end()". With vector-like data structures these properties are hard to avoid (since past-the-beginning is not a valid pointer), and don't impose a real cost (since there's still only one dereference, and all iterators are invalidated on erase). But with lists, this was a poor design. Specifically, the following code (which obviously works with normal iterators) now works with ilist::reverse_iterator as well: for (auto RI = L.rbegin(), RE = L.rend(); RI != RE;) fooThatMightRemoveArgFromList(*RI++); Converting between iterator and reverse_iterator for the same node uses the getReverse() function. reverse_iterator iterator::getReverse(); iterator reverse_iterator::getReverse(); Why doesn't iterator <=> reverse_iterator conversion use constructors? In order to catch and update old code, reverse_iterator does not even have an explicit conversion from iterator. It wouldn't be safe because there would be no reasonable way to catch all the bugs from the changed semantic (see the changes at call sites that are part of this patch). Old code used this API: std::reverse_iterator::reverse_iterator(iterator); iterator std::reverse_iterator::base(); Here's how to update from old code to new (that incorporates the semantic change), assuming I is an ilist<>::iterator and RI is an ilist<>::reverse_iterator: [Old] ==> [New] reverse_iterator(I) (--I).getReverse() reverse_iterator(I) ++I.getReverse() --reverse_iterator(I) I.getReverse() reverse_iterator(++I) I.getReverse() RI.base() (--RI).getReverse() RI.base() ++RI.getReverse() --RI.base() RI.getReverse() (++RI).base() RI.getReverse() delete &*RI, RE = end() delete &*RI++ RI->erase(), RE = end() RI++->erase() ======================================= Note: bundle iterators are out of scope ======================================= MachineBasicBlock::iterator, also known as MachineInstrBundleIterator<MachineInstr>, is a wrapper to represent MachineInstr bundles. The idea is that each operator++ takes you to the beginning of the next bundle. Implementing a sane reverse iterator for this is harder than ilist. Here are the options: - Use std::reverse_iterator<MBB::i>. Store a handle to the beginning of the next bundle. A call to operator*() runs a loop (usually operator--() will be called 1 time, for unbundled instructions). Increment/decrement just works. This is the status quo. - Store a handle to the final node in the bundle. A call to operator*() still runs a loop, but it iterates one time fewer (usually operator--() will be called 0 times, for unbundled instructions). Increment/decrement just works. - Make the ilist_sentinel<MachineInstr> *always* store that it's the sentinel (instead of just in asserts mode). Then the bundle iterator can sniff the sentinel bit in operator++(). I initially tried implementing the end() option as part of this commit, but updating iterator/reverse_iterator conversion call sites was error-prone. I have a WIP series of patches that implements the final option. llvm-svn: 280032
* AMDGPU/R600: Cleanup DAGCombineJan Vesely2016-08-291-15/+12
| | | | | | | | | Move SDLoc initialization to comon place. fall back to AMDGPU version in one place Differential Revision: https://reviews.llvm.org/D23900 llvm-svn: 280030
* Fix typo in comment. NFC.Michael Kuperstein2016-08-291-1/+1
| | | | llvm-svn: 280025
* [ThinLTO] Indirect call promotion fixes for promoted local functionsTeresa Johnson2016-08-292-3/+17
| | | | | | | | | | | | | | | | | | | Summary: Fix a couple issues limiting the application of indirect call promotion in ThinLTO mode: - Invoke indirect call promotion before globalopt, since it may eliminate imported functions which appear unreferenced. - Invoke indirect call promotion with InLTO=true so that the PGOFuncName metadata is used to get the name for locals which would have been renamed during promotion. Reviewers: davidxl, mehdi_amini Subscribers: Prazek, llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D24004 llvm-svn: 280024
* [PowerPC] Fix i8/i16 atomics for little-Endian targets without partword atomicsHal Finkel2016-08-291-6/+12
| | | | | | | | | | | | | | For little-Endian PowerPC, we generally target only P8 and later by default. However, generic (older) 64-bit configurations are still an option, and in that case, partword atomics are not available (e.g. stbcx.). To lower i8/i16 atomics without true i8/i16 atomic operations, we emulate using i32 atomics in combination with a bunch of shifting and masking, etc. The amount by which to shift in little-Endian mode is different from the amount in big-Endian mode (it is inverted -- meaning we can leave off the xor when computing the amount). Fixes PR22923. llvm-svn: 280022
* [SLP] Return a boolean value for these static helpers. NFC.Chad Rosier2016-08-291-17/+16
| | | | | | Differential Revision: https://reviews.llvm.org/D24008 llvm-svn: 280020
* AMDGPU/R600: Remove MergeVectorStores from legalizationJan Vesely2016-08-293-65/+0
| | | | | | | | This is handled by DAGCombiner in a more generic way Differential Revision: https://reviews.llvm.org/D23970 llvm-svn: 280019
* GlobalISel: use multi-dimensional arrays for legalize actions.Tim Northover2016-08-291-12/+16
| | | | | | | | | | | Instead of putting all possible requests into a single table, we can perform the extremely dense lookup based on opcode and type-index in constant time using multi-dimensional array-like things. This roughly halves the time spent doing legalization, which was dominated by queries against the Actions table. llvm-svn: 280011
* Fix a thinko in r278189.Easwaran Raman2016-08-291-1/+1
| | | | llvm-svn: 280008
* AMDGPU: fix mismatch tags, NFCSaleem Abdulrasool2016-08-292-2/+2
| | | | llvm-svn: 280006
* ExecutionEngine: fix a bug in the movt/movw relocatorSaleem Abdulrasool2016-08-291-1/+1
| | | | | | | | | | According to the arm arm specifications, 4 bytes are needed for a shift instead of 8, this was causing the movt instruction to write to a different register sometimes. Patch by Walter Erquinigo! llvm-svn: 280005
* [LV] Move insertelement sequence after scalar definitionsMatthew Simpson2016-08-291-0/+11
| | | | | | | | | | | | | | After r279649 when getting a vector value from VectorLoopValueMap, we create an insertelement sequence on-demand if the value has been scalarized instead of vectorized. We previously inserted this insertelement sequence before the value's first vector user. However, this insert location is problematic if that user is the phi node of a first-order recurrence. With this patch, we move the insertelement sequence after the last scalar instruction we created when scalarizing the value. Thus, the value's vector definition in the new loop will immediately follow its scalar definitions. This should fix PR30183. Reference: https://llvm.org/bugs/show_bug.cgi?id=30183 llvm-svn: 280001
* Propagate TBAA info in SelectionDAG::getIndexedLoadKrzysztof Parzyszek2016-08-291-1/+2
| | | | | | Patch by Pranav Bhandarkar. llvm-svn: 279998
* [Myriad]: add missing 'mcpu' valuesDouglas Katzman2016-08-291-0/+3
| | | | | | Should have been done with r276646. llvm-svn: 279996
* AMDGPU/SI: Implement a custom MachineSchedStrategyTom Stellard2016-08-299-1/+445
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: GCNSchedStrategy re-uses most of GenericScheduler, it's just uses a different method to compute the excess and critical register pressure limits. It's not enabled by default, to enable it you need to pass -misched=gcn to llc. Shader DB stats: 32464 shaders in 17874 tests Totals: SGPRS: 1542846 -> 1643125 (6.50 %) VGPRS: 1005595 -> 904653 (-10.04 %) Spilled SGPRs: 29929 -> 27745 (-7.30 %) Spilled VGPRs: 334 -> 352 (5.39 %) Scratch VGPRs: 1612 -> 1624 (0.74 %) dwords per thread Code Size: 36688188 -> 37034900 (0.95 %) bytes LDS: 1913 -> 1913 (0.00 %) blocks Max Waves: 254101 -> 265125 (4.34 %) Wait states: 0 -> 0 (0.00 %) Totals from affected shaders: SGPRS: 1338220 -> 1438499 (7.49 %) VGPRS: 886221 -> 785279 (-11.39 %) Spilled SGPRs: 29869 -> 27685 (-7.31 %) Spilled VGPRs: 334 -> 352 (5.39 %) Scratch VGPRs: 1612 -> 1624 (0.74 %) dwords per thread Code Size: 34315716 -> 34662428 (1.01 %) bytes LDS: 1551 -> 1551 (0.00 %) blocks Max Waves: 188127 -> 199151 (5.86 %) Wait states: 0 -> 0 (0.00 %) Reviewers: arsenm, mareko, nhaehnle, MatzeB, atrick Subscribers: arsenm, kzhuravl, llvm-commits Differential Revision: https://reviews.llvm.org/D23688 llvm-svn: 279995
* [asan] Enable new stack poisoning with store instruction by defaultVitaly Buka2016-08-291-1/+1
| | | | | | | | | | Reviewers: eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23968 llvm-svn: 279993
* GlobalISel: switch to SmallVector for pending legalizations.Tim Northover2016-08-291-6/+8
| | | | | | std::queue was doing far to many heap allocations to be healthy. llvm-svn: 279992
* AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the schedulerTom Stellard2016-08-292-111/+148
| | | | | | | | | | | | | | | | | | | | Summary: The SILoadStoreOptimizer can now look ahead more then one instruction when looking for instructions to merge, which greatly improves the number of loads/stores that we are able to merge. Moving the pass before scheduling avoids increasing register pressure after the scheduler, so that the scheduler's register pressure estimates will be more accurate. It also gives more consistent results, since it is no longer affected by minor scheduling changes. Reviewers: arsenm Subscribers: arsenm, kzhuravl, llvm-commits Differential Revision: https://reviews.llvm.org/D23814 llvm-svn: 279991
* ASan: remove variable only used in assertions buildTim Northover2016-08-291-2/+1
| | | | llvm-svn: 279990
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