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* Don't use unchecked dyn_castMatt Arsenault2016-06-301-1/+1
| | | | llvm-svn: 274282
* SLPVectorizer: Move propagateMetadata to VectorUtilsMatt Arsenault2016-06-303-68/+48
| | | | | | | | This will be re-used by the LoadStoreVectorizer. Fix handling of range metadata and testcase by Justin Lebar. llvm-svn: 274281
* AMDGPU: Add m0 vgpr load loop block as successorMatt Arsenault2016-06-301-0/+1
| | | | | | | This shows up as a verifier error when I move this earlier, not sure why it didn't before. llvm-svn: 274275
* [libFuzzer] Let user specify extra stats file.Mike Aizatsky2016-06-303-4/+208
| | | | | | | | | | | | Summary: If AFL_DRIVER_EXTRA_STATS_FILENAME is set and valid, write to it peak_rss_mb and slowest_unit_time_sec. These are both stats that libFuzzer can print but afl cannot. Reviewers: kcc, aizatsky, metzman Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21742 llvm-svn: 274273
* Add an artificial line-0 debug location when the compiler emits a call toYunzhong Gao2016-06-301-0/+2
| | | | | | | | __stack_chk_fail(). This avoids a compiler crash. Differential Revision: http://reviews.llvm.org/D21818 llvm-svn: 274263
* Refine the set of UniformAfterVectorization instructions.Wei Mi2016-06-301-26/+71
| | | | | | | | | | Except the seed uniform instructions (conditional branch and consecutive ptr instructions), dependencies to be added into uniform set should only be used by existing uniform instructions or intructions outside of current loop. Differential Revision: http://reviews.llvm.org/D21755 llvm-svn: 274262
* Delete MCCodeGenInfo.Rafael Espindola2016-06-3019-237/+41
| | | | | | | MC doesn't really care about CodeGen stuff, so this was just complicating target initialization. llvm-svn: 274258
* revert http://reviews.llvm.org/D21101Etienne Bergeron2016-06-301-39/+0
| | | | llvm-svn: 274251
* [pdb] Re-add code to write PDB files.Zachary Turner2016-06-303-47/+92
| | | | | | | | | Somehow all the functionality to write PDB files got removed, probably accidentally when uploading the patch perhaps the wrong one got uploaded. This re-adds all the code, as well as the corresponding test. llvm-svn: 274248
* [exceptions] Upgrade exception handlers when stack protector is usedEtienne Bergeron2016-06-301-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: MSVC provide exception handlers with enhanced information to deal with security buffer feature (/GS). To be more secure, the security cookies (GS and SEH) are validated when unwinding the stack. The following code: ``` void f() {} void foo() { __try { f(); } __except(1) { f(); } } ``` Reviewers: majnemer, rnk Subscribers: thakis, llvm-commits, chrisha Differential Revision: http://reviews.llvm.org/D21101 llvm-svn: 274239
* fix formatting, add TODO; NFCSanjay Patel2016-06-301-1/+2
| | | | llvm-svn: 274238
* [DSE] Fix bug in partial overwrite trackingJun Bum Lim2016-06-301-7/+14
| | | | | | | | | | | | | | Summary: Found cases where DSE incorrectly add partially-overwritten intervals. Please see the test case for details. Reviewers: mcrosier, eeckstein, hfinkel Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D21859 llvm-svn: 274237
* [InstCombine] shrink switch conditions better (PR24766)Sanjay Patel2016-06-301-7/+5
| | | | | | | | | | | | | | https://llvm.org/bugs/show_bug.cgi?id=24766#c2 This removes a hack that was added for the benefit of x86 codegen. It prevented shrinking the switch condition even to smaller legal (DataLayout) types. We have a safety mechanism in CGP after: http://reviews.llvm.org/rL251857 ...so we're free to use the optimal (smallest) IR type now. Differential Revision: http://reviews.llvm.org/D12965 llvm-svn: 274233
* Test commitElliot Colp2016-06-301-1/+1
| | | | llvm-svn: 274232
* [InstCombine] use ConstantExpr::getBitCast() instead of creating useless ↵Sanjay Patel2016-06-301-2/+1
| | | | | | instruction llvm-svn: 274229
* [InstCombine] extend matchSelectFromAndOr() to work with i1 scalar typesSanjay Patel2016-06-301-10/+26
| | | | | | | | If the incoming types are i1, then we don't have to pattern match any sext ops. Differential Revision: http://reviews.llvm.org/D21740 llvm-svn: 274228
* Don't repeat names in comments. NFC.Rafael Espindola2016-06-301-4/+3
| | | | llvm-svn: 274226
* Delete unused includes. NFC.Rafael Espindola2016-06-3019-18/+1
| | | | llvm-svn: 274225
* [SystemZ] Let z13 also support FeatureMiscellaneousExtensions.Jonas Paulsson2016-06-301-0/+1
| | | | | | | | | | | This processor feature had been left out by mistake from the z13 ProcessorModel. This time with updated test case. Thanks, Hans. Reviewed by Ulrich Weigand. llvm-svn: 274216
* [AArch64] Add Broadcom Vulcan scheduling model.Pankaj Gode2016-06-303-4/+863
| | | | | | | | Adding scheduling model for new Broadcom Vulcan core (ARMv8.1A). Differential Revision: http://reviews.llvm.org/D21728 llvm-svn: 274213
* Use ShuffleVectorSDNode::isSplat member method instead of static method ↵Craig Topper2016-06-302-3/+2
| | | | | | isSplatMask where the mask came directly from getMask() on a shuffle node. llvm-svn: 274208
* [CodeView] Implement support for bitfields in LLVMDavid Majnemer2016-06-302-11/+33
| | | | | | | | | | | | | CodeView need to know the offset of the storage allocation for a bitfield. Encode this via the "extraData" field in DIDerivedType and introduced a new flag, DIFlagBitField, to indicate whether or not a member is a bitfield. This fixes PR28162. Differential Revision: http://reviews.llvm.org/D21782 llvm-svn: 274200
* [SCEV] Compute max be count from shift operator only if all else failsSanjoy Das2016-06-301-6/+9
| | | | | | | In particular, check to see if we can compute a precise trip count by exhaustively simulating the loop first. llvm-svn: 274199
* [CFLAA] Add support for ModRef queries.George Burgess IV2016-06-301-0/+71
| | | | | | | | | | | | This patch makes CFLAA answer some ModRef queries. Because we don't distinguish between reading/writing when making StratifiedSets, we're unable to offer any of the readonly-related answers. Patch by Jia Chen. Differential Revision: http://reviews.llvm.org/D21858 llvm-svn: 274197
* RegisterScavenging: Code cleanup; NFCMatthias Braun2016-06-301-40/+26
| | | | | | | | | | | | | - Use range based for loops - No need for some !Reg checks: isPhysicalRegister() reports false for NoRegister anyway - Do not repeat function name in documentation comment. - Do not repeat documentation comment in implementation when we already have one at the declaration. - Factor some common subexpressions out. - Change file comments to use doxygen syntax. llvm-svn: 274194
* [SystemZ] Split up PerformDAGCombine. [NFC]Marcin Koscielnicki2016-06-302-142/+183
| | | | | | This function is already a bit too long, and I'm about to make it worse. llvm-svn: 274191
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-3091-3232/+3185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly a mechanical change to make TargetInstrInfo API take MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator) when the argument is expected to be a valid MachineInstr. This is a general API improvement. Although it would be possible to do this one function at a time, that would demand a quadratic amount of churn since many of these functions call each other. Instead I've done everything as a block and just updated what was necessary. This is mostly mechanical fixes: adding and removing `*` and `&` operators. The only non-mechanical change is to split ARMBaseInstrInfo::getOperandLatencyImpl out from ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a `MachineInstr*` which it updated to the instruction bundle leader; now, the latter calls the former either with the same `MachineInstr&` or the bundle leader. As a side effect, this removes a bunch of MachineInstr* to MachineBasicBlock::iterator implicit conversions, a necessary step toward fixing PR26753. Note: I updated WebAssembly, Lanai, and AVR (despite being off-by-default) since it turned out to be easy. I couldn't run tests for AVR since llc doesn't link with it turned on. llvm-svn: 274189
* PrologEpilogInserter: Some code cleanup; NFCMatthias Braun2016-06-291-40/+36
| | | | | | | | | - Use range based for - Use the more common variable names MBB and MF for MachineBasicBlock/MachineFunction variables. - Add a few const modifiers llvm-svn: 274187
* Object: Replace NewArchiveIterator with a simpler NewArchiveMember class. NFCI.Peter Collingbourne2016-06-292-121/+75
| | | | | | | | | | | | | | | | The NewArchiveIterator class has a problem: it requires too much context. Any memory buffers added to the archive must be stored within an Archive::Member, which must have an associated Archive. This makes it harder than necessary to create new archive members (or new archives entirely) from scratch using memory buffers. This patch replaces NewArchiveIterator with a NewArchiveMember class that stores just the memory buffer and the information that goes into the archive member header. Differential Revision: http://reviews.llvm.org/D21721 llvm-svn: 274183
* [LV] Improve accuracy and formatting of function commentAdam Nemet2016-06-291-2/+3
| | | | llvm-svn: 274182
* Resubmit "Update llvm command line parser to support subcommands."Zachary Turner2016-06-291-98/+383
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes an issue where occurrence counts would be unexpectedly reset when parsing different parts of a command line multiple times. **ORIGINAL COMMIT MESSAGE** This allows command line tools to use syntaxes like the following: llvm-foo.exe command1 -o1 -o2 llvm-foo.exe command2 -p1 -p2 Where command1 and command2 contain completely different sets of valid options. This is backwards compatible with previous uses of llvm cl which did not support subcommands, as any option which specifies no optional subcommand (e.g. all existing code) goes into a special "top level" subcommand that expects dashed options to appear immediately after the program name. For example, code which is subcommand unaware would generate a command line such as the following, where no subcommand is specified: llvm-foo.exe -q1 -q2 The top level subcommand can co-exist with actual subcommands, as it is implemented as an actual subcommand which is searched if no explicit subcommand is specified. So llvm-foo.exe as specified above could be written so as to support all three aforementioned command lines simultaneously. There is one additional "special" subcommand called AllSubCommands, which can be used to inject an option into every subcommand. This is useful to support things like help, so that commands such as: llvm-foo.exe --help llvm-foo.exe command1 --help llvm-foo.exe command2 --help All work and display the help for the selected subcommand without having to explicitly go and write code to handle each one separately. This patch is submitted without an example of anything actually using subcommands, but a followup patch will convert the llvm-pdbdump tool to use subcommands. Reviewed By: beanz llvm-svn: 274171
* Revert r273313 "[NVPTX] Improve lowering of byval args of device functions."Artem Belevich2016-06-293-79/+15
| | | | | | The change causes llvm crash in some unoptimized builds. llvm-svn: 274163
* StackColoring for SafeStack.Evgeniy Stepanov2016-06-296-38/+696
| | | | | | | | | | | | | | | | This is a fix for PR27842. An IR-level implementation of stack coloring tailored to work with SafeStack. It is a bit weaker than the MI implementation in that it does not the "lifetime start at first access" logic. This can be improved in the future. This patch also replaces the naive implementation of stack frame layout with a greedy algorithm that can split existing stack slots and even fit small objects inside the alignment padding of other objects. llvm-svn: 274162
* Change Archive::create() from ErrorOr<...> to Expected<...> and updateKevin Enderby2016-06-293-20/+27
| | | | | | | | | its clients. This commit will break the next lld builds. I’ll be committing the matching change for lld next. llvm-svn: 274160
* [InstCombine] Simplify and correct folding fcmps with the same childrenTim Shen2016-06-291-122/+76
| | | | | | | | | | | | | | Summary: Take advantage of FCmpInst::Predicate's bit pattern and handle (fcmp *, x, y) | (fcmp *, x, y) and (fcmp *, x, y) & (fcmp *, x, y) more consistently. Also fold more FCmpInst::FCMP_FALSE and FCmpInst::FCMP_TRUE to constants. Currently InstCombine wrongly folds (fcmp ogt, x, y) | (fcmp ord, x, y) to (fcmp ogt, x, y); this patch also fixes that. Reviewers: spatel Subscribers: llvm-commits, iteratee, echristo Differential Revision: http://reviews.llvm.org/D21775 llvm-svn: 274156
* [InstCombine, NFC] Change the generated variable names by creating new ↵Tim Shen2016-06-291-6/+6
| | | | | | | | instructions This removes some noise for D21775's test changes. llvm-svn: 274155
* [Triple] Reimplement isLittleEndian(). Now it works for arm too.Davide Italiano2016-06-291-30/+25
| | | | | | Differential Revision: http://reviews.llvm.org/D21846 llvm-svn: 274154
* Permit memory operands in ins/outs instructionsNirav Dave2016-06-291-4/+6
| | | | | | | | | | | | | | | [x86] (PR15455) While (ins|outs)[bwld] instructions do not take %dx as a memory operand, various unofficial references do and objdump disassembles to this format. Extend special treatment of similar (in|out)[bwld] operations. Reviewers: craig.topper, rnk, ab Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18837 llvm-svn: 274152
* Revert r272251, it caused PR28348.Nico Weber2016-06-291-40/+1
| | | | llvm-svn: 274141
* [X86] Lower blended PACKUSes using appropriate types.Ahmed Bougacha2016-06-291-11/+14
| | | | | | | | | | | | | When lowering two blended PACKUS, we used to disregard the types of the PACKUS inputs, indiscriminately generating a v16i8 PACKUS. This leads to non-selectable things like: (v16i8 (PACKUS (v4i32 v0), (v4i32 v1))) Instead, check that the PACKUSes have the same type, and use that as the final result type. llvm-svn: 274138
* [ManagedStatic] Reimplement double-checked locking with std::atomic.Benjamin Kramer2016-06-291-12/+3
| | | | | | | | | | | | | This gets rid of the memory fence in the hot path (dereferencing the ManagedStatic), trading for an extra mutex lock in the cold path (when the ManagedStatic was uninitialized). Since this only happens on the first accesses it shouldn't matter much. On strict architectures like x86 this removes any atomic instructions from the hot path. Also remove the tsan annotations, tsan knows how standard atomics work so they should be unnecessary now. llvm-svn: 274131
* Drop support for creating $stubs.Rafael Espindola2016-06-2910-288/+18
| | | | | | They are created by ld64 since OS X 10.5. llvm-svn: 274130
* Reverted patch 273864Elena Demikhovsky2016-06-292-12/+89
| | | | llvm-svn: 274115
* [SystemZ] Add floating-point test data class instructions.Marcin Koscielnicki2016-06-295-0/+29
| | | | | | | These are not used by CodeGen yet - ISD combiners creating the new node will come in subsequent patches. llvm-svn: 274108
* Revert "[Coverage] Move logic to encode filenames and mappings into llvm (NFC)"Vedant Kumar2016-06-291-49/+8
| | | | | | | | | This reverts commit 520a8298d8ef676b5da617ba3d2c7fa37381e939 (r273055). This is breaking stage2 instrumented builds with "malformed coverage data" errors. llvm-svn: 274106
* Revert "[Coverage] Clarify ownership of a MemoryBuffer in the reader (NFC)"Vedant Kumar2016-06-292-9/+8
| | | | | | This reverts commit 1037ef2574adde2103ad221d63834c3e1df4a776. llvm-svn: 274105
* Revert "[ValueTracking] Teach computeKnownBits for PHI nodes to compute sign ↵Craig Topper2016-06-291-12/+0
| | | | | | | | bit for a recurrence with a NSW addition." This is breaking an optimizaton remark test in clang. I've identified a couple fixes for that, but want to understand it better before I commit to anything. llvm-svn: 274102
* [Diag] Add getter shouldAlwaysPrint. NFCAdam Nemet2016-06-293-5/+6
| | | | | | | | | | For the new hotness attribute, the API will take the pass rather than the pass name so we can no longer play the trick of AlwaysPrint being a special pass name. This adds a getter to help the transition. There is also a corresponding clang patch. llvm-svn: 274100
* [ValueTracking] Teach computeKnownBits for PHI nodes to compute sign bit for ↵Craig Topper2016-06-291-0/+12
| | | | | | | | | | | | a recurrence with a NSW addition. If a operation for a recurrence is an addition with no signed wrap and both input sign bits are 0, then the result sign bit must also be 0. Similar for the negative case. I found this deficiency while playing around with a loop in the x86 backend that contained a signed division that could be optimized into an unsigned division if we could prove both inputs were positive. One of them being the loop induction variable. With this patch we can perform the conversion for this case. One of the test cases here is a contrived variation of the loop I was looking at. Differential revision: http://reviews.llvm.org/D21493 llvm-svn: 274098
* [DAGCombine] Teach DAG combine to handle ORs of shuffles involving zero ↵Craig Topper2016-06-291-45/+52
| | | | | | vectors where the zero vector is the first operand to the shuffle instead of the second. llvm-svn: 274097
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