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* [Disasm][AVX512] Implement decoding of top bit for non-destructive reg fieldsAdam Nemet2014-06-241-1/+2
| | | | | | | | | V' bit in the P2 byte of the EVEX prefix provides the top bit of the NDD and NDS register fields. This was simply not used in the decoder until now. Fixes <rdar://problem/17402661> llvm-svn: 211565
* Support: Move class ScaledNumberDuncan P. N. Exon Smith2014-06-242-190/+187
| | | | | | | | ScaledNumber has been cleaned up enough to pull out of BFI now. Still work to do there (tests for shifting, bloated printing code, etc.), but it seems clean enough for its new home. llvm-svn: 211562
* BFI: Un-floatify more languageDuncan P. N. Exon Smith2014-06-241-23/+24
| | | | llvm-svn: 211561
* Support: Extract ScaledNumbers::MinScale and MaxScaleDuncan P. N. Exon Smith2014-06-241-10/+5
| | | | llvm-svn: 211558
* BFI: Change language from "exponent" to "scale"Duncan P. N. Exon Smith2014-06-231-8/+8
| | | | llvm-svn: 211557
* BFI: Rename UnsignedFloat => ScaledNumberDuncan P. N. Exon Smith2014-06-231-17/+17
| | | | | | | A lot of the docs and API are out of date, but I'll leave that for a separate commit. llvm-svn: 211555
* Pass a std::unique_ptr& to the create??? methods is lib/Object.Rafael Espindola2014-06-239-36/+46
| | | | | | | | This makes the buffer ownership on error conditions very natural. The buffer is only moved out of the argument if an object is constructed that now owns the buffer. llvm-svn: 211546
* [FastISel][X86] Lower unsupported selects to control-flow.Juergen Ributzka2014-06-231-0/+71
| | | | | | | | The extends the select lowering coverage by emiting pseudo cmov instructions. These insturction will be later on lowered to control-flow to simulate the select. llvm-svn: 211545
* [FastISel][X86] Add support for floating-point select.Juergen Ributzka2014-06-231-0/+128
| | | | | | | | | | This extends the select lowering to support floating-point selects. The lowering depends on SSE instructions and that the conditon comes from a floating-point compare. Under this conditions it is possible to emit an optimized instruction sequence that doesn't require any branches to simulate the select. llvm-svn: 211544
* [FastISel][X86] Optimize selects when the condition comes from a compare.Juergen Ributzka2014-06-233-37/+152
| | | | | | | Optimize the select instructions sequence to use the EFLAGS directly from a compare when possible. llvm-svn: 211543
* Make ObjectFile and BitcodeReader always own the MemoryBuffer.Rafael Espindola2014-06-2311-121/+91
| | | | | | | | | | This allows us to just use a std::unique_ptr to store the pointer to the buffer. The flip side is that they have to support releasing the buffer back to the caller. Overall this looks like a more efficient and less brittle api. llvm-svn: 211542
* This reverts commit r211533 and r211539.Rafael Espindola2014-06-231-54/+1
| | | | | | | | | Revert "Fix PR20056: Implement pseudo LDR <reg>, =<literal/label> for AArch64" Revert "Fix cmake build." It was missing a file. llvm-svn: 211540
* Fix cmake build.Juergen Ributzka2014-06-231-1/+0
| | | | llvm-svn: 211539
* Fix PR20056: Implement pseudo LDR <reg>, =<literal/label> for AArch64Weiming Zhao2014-06-232-1/+55
| | | | | | | | | | | | | | | | | | | This patch is based on the changes from ARM target [1,2] Based on ARM doc [3], if the literal value can be loaded with a valid MOV, it can emit that instruction. This is implemented in this patch. [1] Fix PR18345: ldr= pseudo instruction produces incorrect code when using in inline assembly Author: David Peixotto <dpeixott@codeaurora.org> commit b92cca222898d87bbc764fa22e805adb04ef7f13 (r200777) [2] Implement the ldr-pseudo opcode for ARM assembly Author: David Peixotto <dpeixott@codeaurora.org> commit 0fa193b08627927ccaa0804a34d80480894614b8 (r197708) [3] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CJAHAIBC.html Differential Revision: http://reviews.llvm.org/D4163 llvm-svn: 211533
* Convert a few methods to use ErrorOr.Rafael Espindola2014-06-231-10/+6
| | | | | | | It used to be inconvenient to mix ErrorOr and UniquePtr, but with c++11 they work OK together. llvm-svn: 211532
* [Mips] Add a target streamer when creating a null streamer.Rafael Espindola2014-06-233-33/+70
| | | | | | Should fix DebugInfo/global.ll on the mips bot. llvm-svn: 211527
* Recommit 211309 (StringMap::insert), reverted in 211328 due to issues with ↵David Blaikie2014-06-231-2/+8
| | | | | | | | | | | | private, but non-deleted, move members. Certain versions of GCC (~4.7) couldn't handle the SFINAE on access control, but with "= delete" (hidden behind a macro for portability) this issue is worked around/addressed. Patch by Agustín Bergé llvm-svn: 211525
* R600/SI: Verify restrictions on div_scale operands.Matt Arsenault2014-06-231-0/+35
| | | | llvm-svn: 211524
* R600/SI: Fix div_scale intrinsic.Matt Arsenault2014-06-234-4/+62
| | | | | | | The operand that must match one of the others does matter, and implement selecting for it. llvm-svn: 211523
* ARMEB: Vector extend operationsChristian Pirker2014-06-232-20/+150
| | | | | | Reviewed at http://reviews.llvm.org/D4043 llvm-svn: 211520
* R600: Remove AMDILISelLoweringMatt Arsenault2014-06-236-48/+13
| | | | llvm-svn: 211519
* R600: Select is not expensive.Matt Arsenault2014-06-231-0/+7
| | | | llvm-svn: 211518
* R600: Move add/sub with overflow out of AMDILISelLoweringMatt Arsenault2014-06-233-19/+12
| | | | | | Add more tests for these. llvm-svn: 211517
* R600: Move more out of AMDILISelLoweringMatt Arsenault2014-06-233-37/+19
| | | | llvm-svn: 211516
* R600: Don't set fp_round_inreg action.Matt Arsenault2014-06-231-9/+0
| | | | | | | There's no point in setting this since it seems to only by created in 1 place for ppcf128 llvm-svn: 211515
* R600/SI: Handle i64 sub.Matt Arsenault2014-06-234-13/+25
| | | | | | We can handle it the same way as add llvm-svn: 211514
* R600/SI: Move selection of i64 add to separate function.Matt Arsenault2014-06-231-39/+43
| | | | | | Also don't use a SmallVector for fixed size array. llvm-svn: 211513
* R600: Rename AMDIL fileMatt Arsenault2014-06-237-38/+33
| | | | llvm-svn: 211512
* Fix missing words in sentenceMatt Arsenault2014-06-231-3/+3
| | | | llvm-svn: 211511
* Use helper functionMatt Arsenault2014-06-231-7/+2
| | | | llvm-svn: 211510
* Alphabetize forward declarationsMatt Arsenault2014-06-231-2/+2
| | | | llvm-svn: 211509
* Support: Extract ScaledNumbers::compare()Duncan P. N. Exon Smith2014-06-231-0/+13
| | | | llvm-svn: 211507
* Allow using .cfi_startproc without a leading symbol.Rafael Espindola2014-06-232-10/+2
| | | | | | This is possible now that we don't produce .eh symbols. This fixes pr19430. llvm-svn: 211502
* Stop producing func.eh symbols on Darwin.Rafael Espindola2014-06-232-9/+0
| | | | | | | | | | According Nick Kledzik (http://llvm.org/bugs/show_bug.cgi?id=19430#c2): "... mach-o no longer needs names in the __eh_frame section (and has not for years)." Iain Sandoe confirms it is also unnecessary for their old darwin support. llvm-svn: 211500
* Remove a temporary hack.Rafael Espindola2014-06-231-10/+0
| | | | | | | Amusingly this survived a lot longer than the CFI transition. We don't even support non-cfi assemblers any more. llvm-svn: 211498
* [PowerPC] Refactor getMinCallFrameSize / getMinCallArgumentsSizeUlrich Weigand2014-06-234-51/+20
| | | | | | | | | | | | | | | | | | | | As of r211495, the only remaining users of getMinCallFrameSize are in core ABI code (LowerFormalParameter / LowerCall). This is actually a good thing, since the details of the parameter save area are ABI specific. With the new ELFv2 ABI in particular, the rules defining the size of the save area will become significantly more complex, so it wouldn't make sense to implement those outside ABI code that has all required information. In preparation, this patch eliminates the getMinCallFrameSize (and associated getMinCallArgumentsSize) routines, and inlines them into all callers. Note that since nearly all call arguments are constant, this allows simplifying the inlined copies to a single line everywhere. No change in generate code expected. llvm-svn: 211497
* [PowerPC] Allow stack frames without parameter save areaUlrich Weigand2014-06-232-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PPCFrameLowering::determineFrameLayout routine currently ensures that every function that allocates a stack frame provides space for the parameter save area (via PPCFrameLowering::getMinCallFrameSize). This is actually not necessary. There may be functions that never call another routine but still allocate a frame; those do not require the parameter save area. In the future, with the ELFv2 ABI, even some routines that do call other functions do not need to allocate the parameter save area. While it is not a bug to allocate the parameter area when it is not needed, it is better to avoid it to save stack space. Note that when any particular function call requires the parameter save area, this space will already have been included by ABI code in the size the CALLSEQ_START insn is annotated with, and therefore included in the size returned by MFI->getMaxCallFrameSize(). This means that determineFrameLayout simply does not need to care about the parameter save area. (It still needs to ensure that every frame provides the linkage area.) This is implemented by this patch. Note that this exposed a bug in the new fast-isel code where the parameter area was *not* included in the CALLSEQ_START size; this is also fixed. A couple of test cases needed to be adapted for the new (smaller) stack frame size those tests now see. llvm-svn: 211495
* [PowerPC] Fix IsDarwin arg in PPCFrameLowering:: callsUlrich Weigand2014-06-231-5/+5
| | | | | | | | | | | | | | | | As remarked in the commit message to r211493, in several places throughout the 64-bit SVR4 ABI code there are calls to PPCFrameLowering::getLinkageSize and getMinCallFrameSize using an incorrect IsDarwin argument of "true". (Some of those were made explicit by the above refactoring patch, others have been there all along.) This patch fixes those places to pass "false" for IsDarwin. No change in generated code expected. llvm-svn: 211494
* [PowerPC] Refactor setMinReservedArea and CalculateParameterAndLinkageAreaSizeUlrich Weigand2014-06-232-127/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PPCISelLowering.cpp routines PPCTargetLowering::setMinReservedArea and CalculateParameterAndLinkageAreaSize are currently used as subroutines from both 64-bit SVR4 and Darwin ABI code. However, the two ABIs are already quite different w.r.t. AltiVec conventions, and they will become more different when the ELFv2 ABI is supported. Also, in general it seems better to disentangle ABI support routines for different ABIs to avoid accidentally affecting one ABI when intending to change only the other. (Actually, the current code strictly speaking already contains a bug: these routines call PPCFrameLowering::getMinCallFrameSize and PPCFrameLowering::getLinkageSize with the IsDarwin parameter set to "true" even on 64-bit SVR4. This bug currently has no adverse effect since those routines always return the same for 64-bit SVR4 and 64-bit Darwin, but it still seems wrong ... I'll fix this in a follow-up commit shortly.) To remove this code sharing, I'm simply inlining both routines into all call sites (there are just two each, one for 64-bit SVR4 and one for Darwin), and simplifying due to constant parameters where possible. A small piece of code that *does* make sense to share is refactored into the new routine EnsureStackAlignment, now also called from 32-bit SVR4 ABI code. No change in generated code is expected. llvm-svn: 211493
* [PowerPC] Fix on-stack AltiVec arguments with 64-bit SVR4Ulrich Weigand2014-06-231-44/+29
| | | | | | | | | | | | | | | | | | Current 64-bit SVR4 code seems to have some remnants of Darwin code in AltiVec argument handing. This had the effect that AltiVec arguments (or subsequent arguments) were not correctly placed in the parameter area in some cases. The correct behaviour with the 64-bit SVR4 ABI is: - All AltiVec arguments take up space in the parameter area, just like any other arguments, whether vararg or not. - They are always 16-byte aligned, skipping a parameter area doubleword (and the associated GPR, if any), if necessary. This patch implements the correct behaviour and adds a test case. (Verified against GCC behaviour via the ABI compat test suite.) llvm-svn: 211492
* ARM: mark UBFX as not allowing PC.Tim Northover2014-06-231-2/+2
| | | | | | | | | Strictly, it's unpredictable. But we don't quite model that yet and an error is better than ignoring the issue. This one somehow got left out before though. rdar://problem/15997748 llvm-svn: 211490
* MC: Cleanup parseMSInlineAsmDavid Majnemer2014-06-231-16/+13
| | | | | | | | | Utilize range based for-loops to simplify some code. Use insert() instead of a loop for simplicity/efficiency. No functionality change. llvm-svn: 211486
* MC: adjust text section flags for WoASaleem Abdulrasool2014-06-222-8/+15
| | | | | | | | | | | | | | | | | | | | | | | Correct the section flags for code built for Windows on ARM with `-ffunction-sections`. Windows on ARM uses solely Thumb-2 instructions, and indicates that the function is thumb by placing it in a text section that has IMAGE_SCN_MEM_16BIT flag set. When we encounter a .section directive, a new section is constructed. This may be a text segment. In order to identify that we need the additional flag, expose the target triple through the ObjectFileInfo as this information is lost otherwise. Since any modern ARM targeting environment on Windows would be Thumb-2 (Windows ARM NT or Windows Embedded Compact), introducing a new flag to indicate the section attribute seems to be a bit overkill. Simply depend on the target triple. Since there is one location that this information is currently needed, creating a target specific assembly parser and delegating the parsing of section switches also feels a bit heavy handed. If it turns out that this information ends up changing additional behaviour, then it may be worth considering that alternative. llvm-svn: 211481
* Revert r211399, "Generate native unwind info on Win64"NAKAMURA Takumi2014-06-2211-414/+190
| | | | | | It broke Legacy JIT Tests on x86_64-{mingw32|msvc}, aka Windows x64. llvm-svn: 211480
* R600: Use LowerSDIVREM for i64 node replaceJan Vesely2014-06-223-92/+120
| | | | | | | | v2: move div/rem node replacement to R600ISelLowering make lowerSDIVREM protected Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 211478
* R600: Implement custom SDIVREM.Jan Vesely2014-06-222-4/+44
| | | | | | | | | | Instead of separate SDIV/SREM. SDIV used UDIV which in turn used UDIVREM anyway. SREM used SDIV(UDIV->UDIVREM)+MUL+SUB, using UDIVREM directly is more efficient. v2: Don't use all caps names Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 211477
* Fix PR20087 by using the source index when changing the vector loadFilipe Cabecinhas2014-06-221-2/+2
| | | | llvm-svn: 211472
* LoopVectorizer: Fix a dominance issueArnold Schwaighofer2014-06-221-8/+17
| | | | | | | The induction variables start value needs to be defined before we branch (overflow check) to the scalar preheader where we used it. llvm-svn: 211460
* MergeFunctions Pass, removed DenseMap helpers.Stepan Dyatkovskiy2014-06-221-104/+0
| | | | | | | | | | | Patch removes rest part of code related to old implementation. This patch belongs to patch series that improves MergeFunctions performance time from O(N*N) to O(N*log(N)). This one was the final patch. llvm-svn: 211457
* MergeFunctions Pass, updated header comments.Stepan Dyatkovskiy2014-06-221-9/+47
| | | | | | | | | | Added short description for new comparison algorithm, that introduces total ordering among functions set. This patch belongs to patch series that improves MergeFunctions performance time from O(N*N) to O(N*log(N)). llvm-svn: 211456
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