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* LTO depends on Object now.Rafael Espindola2014-07-031-1/+1
| | | | | | | Fixes the build with only the ARM backend enabled. For some reason some other backend was pulling Object and this went unnoticed. llvm-svn: 212288
* Run interprocedural const prop before global optimizerGerolf Hoflehner2014-07-031-1/+1
| | | | | | | | | | | Exposes more constant globals that can be removed by the global optimizer. A specific example is the removal of the static global block address array in clang/test/CodeGen/indirect-goto.c. This change impacts only lower optimization levels. With LTO interprocedural const prop runs already before global opt. llvm-svn: 212284
* Add support for inline asm symbols to IRObjectFile.Rafael Espindola2014-07-035-122/+233
| | | | | | This also enables it in llvm-nm so that it can be tested. llvm-svn: 212282
* IR: cleanup Module::dropReferencesDavid Majnemer2014-07-031-6/+6
| | | | | | This replaces some old-style loops with range-based for. llvm-svn: 212278
* [ARM] Implement ISB memory barrier intrinsicYi Kong2014-07-032-7/+8
| | | | | | | Adds support for __builtin_arm_isb. Also corrects DSB and ISB instructions modelling by adding has-side-effects property. llvm-svn: 212276
* bug fix for PR20020: anti-dependency-breaker causes miscompilationSanjay Patel2014-07-031-0/+31
| | | | | | | | | | | | | This patch sets the 'KeepReg' bit for any tied and live registers during the PrescanInstruction() phase of the dependency breaking algorithm. It then checks those 'KeepReg' bits during the ScanInstruction() phase to avoid changing any tied registers. For more details, please see comments in: http://llvm.org/bugs/show_bug.cgi?id=20020 I added two FIXME comments for code that I think can be removed by using register iterators that include self. I don't want to include those code changes with this patch, however, to keep things as small as possible. The test case is larger than I'd like, but I don't know how to reduce it further and still produce the failing asm. Differential Revision: http://reviews.llvm.org/D4351 llvm-svn: 212275
* Fix ppcf128 component access on little-endian systemsUlrich Weigand2014-07-034-11/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PowerPC 128-bit long double data type (ppcf128 in LLVM) is in fact a pair of two doubles, where one is considered the "high" or more-significant part, and the other is considered the "low" or less-significant part. When a ppcf128 value is stored in memory or a register pair, the high part always comes first, i.e. at the lower memory address or in the lower-numbered register, and the low part always comes second. This is true both on big-endian and little-endian PowerPC systems. (Similar to how with a complex number, the real part always comes first and the imaginary part second, no matter the byte order of the system.) This was implemented incorrectly for little-endian systems in LLVM. This commit fixes three related issues: - When printing an immediate ppcf128 constant to assembler output in emitGlobalConstantFP, emit the high part first on both big- and little-endian systems. - When lowering a ppcf128 type to a pair of f64 types in SelectionDAG (which is used e.g. when generating code to load an argument into a register pair), use correct low/high part ordering on little-endian systems. - In a related issue, because lowering ppcf128 into a pair of f64 must operate differently from lowering an int128 into a pair of i64, bitcasts between ppcf128 and int128 must not be optimized away by the DAG combiner on little-endian systems, but must effect a word-swap. Reviewed by Hal Finkel. llvm-svn: 212274
* [msan] Stop propagating shadow in blacklisted functions.Evgeniy Stepanov2014-07-031-9/+11
| | | | | | | | | | | | | | With this change all values passed through blacklisted functions become fully initialized. Previous behavior was to initialize all loads in blacklisted functions, but apply normal shadow propagation logic for all other operation. This makes blacklist applicable in a wider range of situations. It also makes code for blacklisted functions a lot shorter, which works as yet another workaround for PR17409. llvm-svn: 212268
* Revert of r212265.Evgeniy Stepanov2014-07-031-11/+9
| | | | llvm-svn: 212266
* [msan] Stop propagating shadow in blacklisted functions.Evgeniy Stepanov2014-07-031-9/+11
| | | | | | | | | | | | | | With this change all values passed through blacklisted functions become fully initialized. Previous behavior was to initialize all loads in blacklisted functions, but apply normal shadow propagation logic for all other operation. This makes blacklist applicable in a wider range of situations. It also makes code for blacklisted functions a lot shorter, which works as yet another workaround for PR17409. llvm-svn: 212265
* Minor stylistic fix in SimplifyCFG (test commit)Marcello Maggioni2014-07-031-1/+2
| | | | llvm-svn: 212259
* [x86] Fix the completely broken vector widening legalization of bswap.Chandler Carruth2014-07-031-1/+1
| | | | | | | | | | | | This operation was classified as a binary operation in the widening logic for some reason (clearly, untested). It is in fact a unary operation. Add a RUN line to a test to exercise this for x86. Note that again the vector widening strategy doesn't regress anything and in one case removes a totally unecessary instruction that we couldn't avoid when promoting the element type. llvm-svn: 212257
* [x86] Fix crashes in lowering bitcast instructions with the wideningChandler Carruth2014-07-031-0/+7
| | | | | | | | | | mode. This also runs the test in that mode which would reproduce the crash. What I love is that *every single FIXME* in the test is addressed by switching to widening. llvm-svn: 212254
* Add new lines to debugging information.Richard Trieu2014-07-031-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D4262 llvm-svn: 212250
* [x86] Based on a long conversation between myself, Jim Grosbach, HalChandler Carruth2014-07-032-0/+19
| | | | | | | | | | | | | | | | | Finkel, Eric Christopher, and a bunch of other people I'm probably forgetting (sorry), add an option to the x86 backend to widen vectors during type legalization rather than promote them. This still would promote vNi1 vectors to get the masks right, but would widen other vectors. A lot of experiments are piling up right now showing that widening should probably be the default legalization strategy outside of vNi1 cases, but it is very hard to test the rammifications of that and fix bugs in widening-based legalization without an option that enables it. I'll be checking in tests shortly that use this option to exercise cases where widening doesn't work well and hopefully we'll be able to switch fully to this soon. llvm-svn: 212249
* Invert the MC -> Object dependency.Rafael Espindola2014-07-038-17/+16
| | | | | | | | | Now that we have a lib/MC/MCAnalysis, the dependency was there just because of two helper classes. Move the two over to MC. This will allow IRObjectFile to parse inline assembly. llvm-svn: 212248
* Make these preprocessor directives match all of the others in the port.Eric Christopher2014-07-032-4/+4
| | | | llvm-svn: 212245
* Remove dead code.Eric Christopher2014-07-031-7/+0
| | | | llvm-svn: 212244
* [codegen,aarch64] Add a target hook to the code generator to controlChandler Carruth2014-07-037-46/+80
| | | | | | | | | | | | | | | | | | | | | vector type legalization strategies in a more fine grained manner, and change the legalization of several v1iN types and v1f32 to be widening rather than scalarization on AArch64. This fixes an assertion failure caused by scalarizing nodes like "v1i32 trunc v1i64". As v1i64 is legal it will fail to scalarize v1i32. This also provides a foundation for other targets to have more granular control over how vector types are legalized. Patch by Hao Liu, reviewed by Tim Northover. I'm committing it to allow some work to start taking place on top of this patch as it adds some really important hooks to the backend that I'd like to immediately start using. =] http://reviews.llvm.org/D4322 llvm-svn: 212242
* Move subtarget dependent features into the subtarget from the targetEric Christopher2014-07-034-96/+97
| | | | | | | machine. Includes a fix for a subtarget initialization for hard floating point on mips16. llvm-svn: 212240
* So that we can include frame lowering in the subtarget, remove includeEric Christopher2014-07-025-5/+10
| | | | | | | circular dependency with the subtarget by inlining accessor methods and outlining a routine. llvm-svn: 212236
* So that we can include target lowering in the subtarget, remove includeEric Christopher2014-07-024-64/+80
| | | | | | | circular dependency with the subtarget by inlining accessor methods and outlining a routine. llvm-svn: 212234
* Fix typos.Eric Christopher2014-07-022-2/+2
| | | | llvm-svn: 212228
* Revert "DebugInfo: Ensure that all debug location scope chains from ↵David Blaikie2014-07-023-34/+4
| | | | | | | | | | | | instructions within a function, lead to the function itself." This reverts commit r212205. Reverting this again, still seeing crashes when building compiler-rt... Sorry for the continued noise, not sure why I'm failing to reproduce this locally. llvm-svn: 212226
* Move the data layout and selection dag info from the mips target machineEric Christopher2014-07-024-42/+46
| | | | | | down to the subtarget. llvm-svn: 212224
* [X86] AVX512: Allow writemask argument in vpermt* intrinsicsAdam Nemet2014-07-021-5/+15
| | | | llvm-svn: 212223
* [X86] AVX512: Generate Pat<>'s for the vpermt2* intrinsics via multiclassAdam Nemet2014-07-021-19/+14
| | | | | | | | | | | | | This new multiclass, avx512_perm_table_3src derives from the current one and provides the Pat<>. The next patch will add another Pat<> that uses the writemask. Note that I dropped the type annotation from the intrinsic call, i.e.: (v16f32 VR512:$src1) -> R512:$src1. I think that this should be fine (at least many intrinsic calls don't provide them) and it greatly reduces the number of template arguments. llvm-svn: 212222
* [X86] AVX512: Add writemask variants for vperm*2*Adam Nemet2014-07-021-14/+68
| | | | | | | | | This includes assembler and codegen support (see the new tests in avx512-encodings.s and avx512-shuffle.ll). <rdar://problem/17492620> llvm-svn: 212221
* R600: Add a comment that llvm.AMDGPU.trunc is a legacy intrinsicTom Stellard2014-07-021-1/+1
| | | | llvm-svn: 212218
* R600/SI: Use a ComplexPattern for ADDR64 addressing of MUBUF loadsTom Stellard2014-07-022-37/+35
| | | | llvm-svn: 212217
* R600: Promote i64 loads to v2i32Tom Stellard2014-07-023-7/+12
| | | | llvm-svn: 212216
* R600/SI: Adjsut SGPR live ranges before register allocationTom Stellard2014-07-024-0/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SGPRs are written by instructions that sometimes will ignore control flow, which means if you have code like: if (VGPR0) { SGPR0 = S_MOV_B32 0 } else { SGPR0 = S_MOV_B32 1 } The value of SGPR0 will 1 no matter what the condition is. In order to deal with this situation correctly, we need to view the program as if it were a single basic block when we calculate the live ranges for the SGPRs. They way we actually update the live range is by iterating over all of the segments in each LiveRange object and setting the end of each segment equal to the start of the next segment. So a live range like: [3888r,9312r:0)[10032B,10384B:0) 0@3888r will become: [3888r,10032B:0)[10032B,10384B:0) 0@3888r This change will allow us to use SALU instructions within branches. llvm-svn: 212215
* R600/SI: Add verifier check for immediates in register operands.Tom Stellard2014-07-024-2/+33
| | | | llvm-svn: 212214
* Remove non-static field initializer to appease MSVCAlexey Samsonov2014-07-021-1/+2
| | | | llvm-svn: 212212
* Fix configure+make build.Rafael Espindola2014-07-022-1/+15
| | | | llvm-svn: 212210
* Move CFG building code to a new lib/MC/MCAnalysis library.Rafael Espindola2014-07-0210-21/+29
| | | | | | | The new library is 150KB on a Release+Asserts build, so it is quiet a bit of code that regular users of MC don't need to link with now. llvm-svn: 212209
* DebugInfo: Ensure that all debug location scope chains from instructions ↵David Blaikie2014-07-023-4/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | within a function, lead to the function itself. Originally committed in r211723, reverted in r211724 due to failure cases found and fixed (ArgumentPromotion: r211872, Inlining: r212065), committed again in r212085 and reverted again in r212089 after fixing some other cases, such as debug info subprogram lists not keeping track of the function they represent (r212128) and then short-circuiting things like LiveDebugVariables that build LexicalScopes for functions that might not have full debug info. And again, I believe the invariant actually holds for some reasonable amount of code (but I'll keep an eye on the buildbots and see what happens... ). Original commit message: PR20038: DebugInfo: Inlined call sites where the caller has debug info but the call itself has no debug location. This situation does bad things when inlined, so I've fixed Clang not to produce inlinable call sites without locations when the caller has debug info (in the one case where I could find that this occurred). This updates the PR20038 test case to be what clang now produces, and readds the assertion that had to be removed due to this bug. I've also beefed up the debug info verifier to help diagnose these issues in the future, and I hope to add checks to the inliner to just assert-fail if it encounters this situation. If, in the future, we decide we have to cope with this situation, the right thing to do is probably to just remove all the DebugLocs from the inlined instructions. llvm-svn: 212205
* [RegAllocGreedy] Provide a subtarget hook to disable the local reassignmentQuentin Colombet2014-07-022-4/+19
| | | | | | | | | | | | heuristic. By default, no functionality change. This is a follow-up of r212099. This hook provides a finer grain to control the optimization. <rdar://problem/17444599> llvm-svn: 212204
* Don't try to construct debug LexicalScopes hierarchy for functions that do ↵David Blaikie2014-07-024-4/+26
| | | | | | | | | | | | | | | | | | | | | | | | | not have top level debug information. If a function isn't actually in a CU's subprogram list in the debug info metadata, ignore all the DebugLocs and don't try to build scopes, track variables, etc. While this is possibly a minor optimization, it's also a correctness fix for an incoming patch that will add assertions to LexicalScopes and the debug info verifier to ensure that all scope chains lead to debug info for the current function. Fix up a few test cases that had broken/incomplete debug info that could violate this constraint. Add a test case where this occurs by design (inlining a debug-info-having function in an attribute nodebug function - we want this to work because /if/ the nodebug function is then inlined into a debug-info-having function, it should be fine (and will work fine - we just stitch the scopes up as usual), but should the inlining not happen we need to not assert fail either). llvm-svn: 212203
* Constify the Function pointers in the result of makeSubprogramMapDavid Blaikie2014-07-023-7/+7
| | | | | | | These don't need to be mutable and callers being added soon in CodeGen won't have access to non-const Module&. llvm-svn: 212202
* AArch64: Re-enable AArch64AddressTypePromotionDuncan P. N. Exon Smith2014-07-022-1/+3
| | | | | | | | | | | This reverts commits r212189 and r212190. While this pass was accidentally disabled (until r212073), r205437 slipped in a use of `auto` that should have been `auto&`. This fixes PR20188. llvm-svn: 212201
* AArch64: Remove unnecessary parensDuncan P. N. Exon Smith2014-07-021-1/+1
| | | | llvm-svn: 212199
* R600: Fix crashes when an illegal type load or store is not handled.Matt Arsenault2014-07-021-2/+6
| | | | | | | I don't think anything hits this now, but will be exposed in future patches. llvm-svn: 212197
* AArch64: Merge isa with dyn_castDuncan P. N. Exon Smith2014-07-021-2/+1
| | | | llvm-svn: 212194
* AArch64: Temporarily disable AArch64AddressTypePromotionDuncan P. N. Exon Smith2014-07-021-2/+0
| | | | | | | Temporarily disable AArch64AddressTypePromotion, which was effectively re-enabled in r212073 and r212075, while I look into PR20188. llvm-svn: 212189
* [ASan] Print exact source location of global variables in error reports.Alexey Samsonov2014-07-021-31/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | See https://code.google.com/p/address-sanitizer/issues/detail?id=299 for the original feature request. Introduce llvm.asan.globals metadata, which Clang (or any other frontend) may use to report extra information about global variables to ASan instrumentation pass in the backend. This metadata replaces llvm.asan.dynamically_initialized_globals that was used to detect init-order bugs. llvm.asan.globals contains the following data for each global: 1) source location (file/line/column info); 2) whether it is dynamically initialized; 3) whether it is blacklisted (shouldn't be instrumented). Source location data is then emitted in the binary and can be picked up by ASan runtime in case it needs to print error report involving some global. For example: 0x... is located 4 bytes to the right of global variable 'C::array' defined in '/path/to/file:17:8' (0x...) of size 40 These source locations are printed even if the binary doesn't have any debug info. This is an ABI-breaking change. ASan initialization is renamed to __asan_init_v4(). Pre-built libraries compiled with older Clang will not work with the fresh runtime. llvm-svn: 212188
* Revert "Revert "MachineScheduler: better book-keeping for asserts.""Chad Rosier2014-07-021-7/+11
| | | | | | | | | | | | | This reverts commit r212109, which reverted r212088. However, disable the assert as it's not necessary for correctness. There are several corner cases that the assert needed to handle better for in-order scheduling, but none of them are incorrect scheduler behavior. The assert is mainly there to collect good unit tests like this and ensure that the target-independent scheduler is working as expected with the various machine models. llvm-svn: 212187
* X86: When combining shuffles just remove shuffles that are completely redundant.Benjamin Kramer2014-07-021-0/+7
| | | | | | | CombineTo doesn't allow replacing a node with itself so this would crash if the combined shuffle is the same as the input shuffle. llvm-svn: 212181
* AVX-512: dec/inc instructions are slow on KNLElena Demikhovsky2014-07-021-1/+2
| | | | | | | After Alexey Volkov, I'm adding the same property for KNL, that prefers ADD/SUB instead of INC/DEC. Added a test. llvm-svn: 212178
* Fix missing constMatt Arsenault2014-07-021-1/+1
| | | | llvm-svn: 212168
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