summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Expand)AuthorAgeFilesLines
* [SLP] Fix PR35047: Fix default cost model for cast op in X86.Alexey Bataev2017-11-071-1/+1
* Mark intentional fall-through with LLVM_FALLTHROUGH.Kristof Beyls2017-11-071-0/+1
* [AArch64][SVE] Asm: Replace 'IsVector' by 'RegKind' in AArch64AsmParser (NFC)Florian Hahn2017-11-072-46/+69
* Silence C4715 warning from MSVC (NFC).Kristof Beyls2017-11-071-0/+1
* [GlobalISel] Enable legalizing non-power-of-2 sized types.Kristof Beyls2017-11-076-209/+554
* [CGP] Disable Select instruction handling in optimizeMemoryInst. NFCSerguei Katkov2017-11-071-1/+1
* [X86] Don't clobber reserved registers with stack adjustmentsBjorn Steinbrink2017-11-071-0/+5
* [X86] Add patterns to fold a 64-bit load into the EVEX vcvtph2ps instructions.Craig Topper2017-11-071-7/+16
* [X86] Add patterns for folding a v16i8 with the VEX vcvtph2ps intrinsics.Craig Topper2017-11-071-2/+4
* [X86] Add support for using EVEX instructions for the legacy vcvtph2ps intrin...Craig Topper2017-11-076-28/+40
* [X86] Use IMPLICIT_DEF in VEX/EVEX vcvtss2sd/vcvtsd2ss patterns instead of a ...Craig Topper2017-11-072-4/+4
* [X86] Remove 'Requires' from instructions with no patterns. NFCCraig Topper2017-11-071-6/+3
* [Support/UNIX] posix_fallocate() can fail with EINVAL.Davide Italiano2017-11-071-1/+1
* Make DIExpression::createFragmentExpression() return an Optional.Adrian Prantl2017-11-075-18/+37
* [IPO/LowerTypesTest] Skip blockaddress(es) when replacing uses.Davide Italiano2017-11-072-1/+23
* AMDGPU: Remove redundant combineMatt Arsenault2017-11-072-39/+0
* [DebugInfo] Unify logic to merge DILocations. NFC.Vedant Kumar2017-11-062-19/+28
* [Support][Chrono] Use explicit cast of text output of time values.Simon Dardis2017-11-061-3/+3
* InstCombine: salvage the debug info of DCE'ed add instructions.Adrian Prantl2017-11-061-12/+23
* [X86] Make FeatureAVX512 imply FeatureF16C.Craig Topper2017-11-064-36/+5
* [X86] Make FeatureAVX512 imply FeatureFMA.Craig Topper2017-11-062-5/+5
* [ValueTracking] readonly (const) is a requirement for converting sqrt to llvm...Sanjay Patel2017-11-061-3/+1
* Revert r317510 "[InstCombine] Pull shifts through a select plus binop with co...Hans Wennborg2017-11-061-82/+27
* Fix comment /NFCXinliang David Li2017-11-061-3/+4
* [MIRPrinter] Use %subreg.xxx syntax for subregister index operandsBjorn Pettersson2017-11-061-8/+13
* [InstCombine] Pull shifts through a select plus binop with constantCraig Topper2017-11-061-27/+82
* Fix buildbot breakages from r317503. Add parentheses to assignment when usin...Graham Yiu2017-11-061-2/+2
* Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles...Graham Yiu2017-11-063-3/+117
* Include already promoted counts when computing SUM for VP.Dehao Chen2017-11-061-14/+12
* [PPC] Use xxbrd to speed up bswap64Guozhi Wei2017-11-062-2/+24
* AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32Matt Arsenault2017-11-065-13/+90
* [IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fas...Sanjay Patel2017-11-0619-67/+99
* [X86][SSE] Merge combineExtractVectorElt_SSE into combineExtractVectorElt. NFCI.Simon Pilgrim2017-11-061-12/+8
* [X86][SSE] Combine EXTRACT_VECTOR_ELT with combineExtractWithShuffle before X...Simon Pilgrim2017-11-061-2/+2
* [AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environmentYaxun Liu2017-11-061-0/+4
* [SystemZ] implement hasDivRemOp()Jonas Paulsson2017-11-062-0/+6
* [AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bitYaxun Liu2017-11-061-5/+10
* [mips] Add movep for microMIPS32R6 and fix microMIPS32r3 versionSimon Dardis2017-11-068-5/+51
* [LV][X86] update the cost of interleaving mem. access of floatsMohammed Agabaria2017-11-061-1/+4
* [mips] Fix PR35140Simon Dardis2017-11-061-4/+4
* [X86][AVX512] Improve lowering of AVX512 test intrinsicsUriel Korach2017-11-062-4/+20
* [X86] Replace duplicate function call with variable. NFCUriel Korach2017-11-061-2/+2
* X86 ISel: Basic support for variable-index vector permutationsZvi Rackover2017-11-061-0/+108
* Revert "adding a pattern for broadcastm"Jina Nahias2017-11-061-2/+2
* [ObjectYAML] Map relocation types for COFF ARMNT and ARM64Martin Storsjo2017-11-061-0/+48
* [x86][AVX512] Lowering Broadcastm intrinsics to LLVM IRJina Nahias2017-11-063-18/+27
* adding a pattern for broadcastmJina Nahias2017-11-061-2/+2
* [X86] Use EVEX encoded intrinsics for legacy FMA intrinsics when possible.Craig Topper2017-11-062-39/+49
* [X86] Add scalar FMA ISD nodes without rounding mode. NFCCraig Topper2017-11-065-37/+92
* [X86] Use EVEX encoded instructions for legacy scalar sqrt intrinsics.Craig Topper2017-11-062-10/+19
OpenPOWER on IntegriCloud