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* [mips][microMIPS] Implement SDBBP and RDHWR instructions.Jozef Kolek2014-11-194-4/+31
| | | | | | Differential Revision: http://reviews.llvm.org/D5240 llvm-svn: 222347
* [X86][SSE] pslldq/psrldq byte shifts/rotation for SSE2Simon Pilgrim2014-11-192-33/+160
| | | | | | | | | | This patch builds on http://reviews.llvm.org/D5598 to perform byte rotation shuffles (lowerVectorShuffleAsByteRotate) on pre-SSSE3 (palignr) targets - pre-SSSE3 is only enabled on i8 and i16 vector targets where it is a more definite performance gain. I've also added a separate byte shift shuffle (lowerVectorShuffleAsByteShift) that makes use of the ability of the SLLDQ/SRLDQ instructions to implicitly shift in zero bytes to avoid the need to create a zero register if we had used palignr. Differential Revision: http://reviews.llvm.org/D5699 llvm-svn: 222340
* AliasSetTracker: UnknownInsts should contribute to the refcountDavid Majnemer2014-11-191-15/+26
| | | | | | | | | | | | | | | | | | | AliasSetTracker::addUnknown may create an AliasSet devoid of pointers just to contain an instruction if no suitable AliasSet already exists. It will then AliasSet::addUnknownInst and we will be done. However, it's possible for addUnknown to choose an existing AliasSet to addUnknownInst. If this were to occur, we are in a bit of a pickle: removing pointers from the AliasSet can cause the entire AliasSet to become destroyed, taking our unknown instructions out with them. Instead, keep track whether or not our AliasSet has any unknown instructions. This fixes PR21582. llvm-svn: 222338
* Update SetVector to rely on the underlying set's insert to return a ↵David Blaikie2014-11-1997-207/+226
| | | | | | | | | | | | | pair<iterator, bool> This is to be consistent with StringSet and ultimately with the standard library's associative container insert function. This lead to updating SmallSet::insert to return pair<iterator, bool>, and then to update SmallPtrSet::insert to return pair<iterator, bool>, and then to update all the existing users of those functions... llvm-svn: 222334
* [AArch64] Disable useAA for Cortex-A57.Hao Liu2014-11-191-1/+1
| | | | | | | | Using AA during CodeGen is very useful for in-order cores. It is less useful for ooo cores. Also I find enabling useAA for Cortex-A57 may generate worse code for some test cases. If useAA in codegen is improved and benefical for ooo cores, we can enable it again. llvm-svn: 222333
* [AArch64] Enable SeparateConstOffsetFromGEP, EarlyCSE and LICM passes on ↵Hao Liu2014-11-191-0/+18
| | | | | | | | | | | | AArch64 backend. SeparateConstOffsetFromGEP can gives more optimizaiton opportunities related to GEPs, which benefits EarlyCSE and LICM. By enabling these passes we can have better address calculations and generate a better addressing mode. Some SPEC 2006 benchmarks (astar, gobmk, namd) have obvious improvements on Cortex-A57. Reviewed in http://reviews.llvm.org/D5864. llvm-svn: 222331
* [SeparateConstOffsetFromGEP] Allow SeparateConstOffsetFromGEP pass to lower ↵Hao Liu2014-11-191-40/+272
| | | | | | | | | | | | GEPs. If LowerGEP is enabled, it can lower a GEP with multiple indices into GEPs with a single index or arithmetic operations. Lowering GEPs can always extract structure indices. Lowering GEPs can also give use more optimization opportunities. It can benefit passes like CSE, LICM and CGP. Reviewed in http://reviews.llvm.org/D5864 llvm-svn: 222328
* Remove StringMap::GetOrCreateValue in favor of StringMap::insertDavid Blaikie2014-11-1915-120/+96
| | | | | | | | | | | | | | Having two ways to do this doesn't seem terribly helpful and consistently using the insert version (which we already has) seems like it'll make the code easier to understand to anyone working with standard data structures. (I also updated many references to the Entry's key and value to use first() and second instead of getKey{Data,Length,} and get/setValue - for similar consistency) Also removes the GetOrCreateValue functions so there's less surface area to StringMap to fix/improve/change/accommodate move semantics, etc. llvm-svn: 222319
* llvm-readobj: fix off-by-one error in COFFDumperRui Ueyama2014-11-191-1/+1
| | | | | | | | It printed out base relocation table header as table entry. This patch also makes llvm-readobj to not skip ABSOLUTE entries becuase it was confusing. llvm-svn: 222299
* [Aarch64] Customer lowering of CTPOP to SIMD should check for NEON availabilityWeiming Zhao2014-11-191-0/+3
| | | | llvm-svn: 222292
* [asan] add experimental basic-block tracing to asan-coverage; also fix ↵Kostya Serebryany2014-11-192-7/+43
| | | | | | -fsanitize-coverage=3 which was broken by r221718 llvm-svn: 222290
* llvm-readobj: teach it how to dump COFF base relocation tableRui Ueyama2014-11-191-1/+69
| | | | llvm-svn: 222289
* Introduce llvm::SplitAllCriticalEdgesKostya Serebryany2014-11-192-19/+17
| | | | | | | | | | | | | | | | | | | | Summary: move the code from BreakCriticalEdges::runOnFunction() into a separate utility function llvm::SplitAllCriticalEdges() so that it can be used independently. No functionality change intended. Test Plan: check-llvm Reviewers: nlewycky Reviewed By: nlewycky Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6313 llvm-svn: 222288
* Revert r222039 because of bot failure.Manman Ren2014-11-191-175/+161
| | | | | | | http://lab.llvm.org:8080/green/job/clang-Rlto_master/298/ Hopefully, bot will be green. If not, we will re-submit the commit. llvm-svn: 222287
* R600/SI: Implement areMemAccessesTriviallyDisjointMatt Arsenault2014-11-192-0/+91
| | | | | | | | | This partially makes up for not having address spaces used for alias analysis in some simple cases. This is not yet enabled by default so shouldn't change anything yet. llvm-svn: 222286
* R600/SI: Set hasSideEffects = 0 on load and store instructions.Matt Arsenault2014-11-182-4/+9
| | | | | | | | | | Assuming unmodeled side effects interferes with some scheduling opportunities. Don't put it in the base class of DS instructions since there are a few weird effecting, non load/store instructions there. llvm-svn: 222285
* [X86][AVX] 256-bit vector stack unaligned load/stores identificationSimon Pilgrim2014-11-181-0/+6
| | | | | | | | | | | | Under many circumstances the stack is not 32-byte aligned, resulting in the use of the vmovups/vmovupd/vmovdqu instructions when inserting ymm reloads/spills. This minor patch adds these instructions to the isFrameLoadOpcode/isFrameStoreOpcode helpers so that they can be correctly identified and not be treated as folded reloads/spills. This has also been noticed by http://llvm.org/bugs/show_bug.cgi?id=18846 where it was causing redundant spills - I've added a reduced test case at test/CodeGen/X86/pr18846.ll Differential Revision: http://reviews.llvm.org/D6252 llvm-svn: 222281
* [Hexagon] Adding A2_and instruction.Colin LeMahieu2014-11-182-4/+7
| | | | llvm-svn: 222274
* [FastISel][AArch64] Also allow folding of sign-/zero-extend and arithmeticChad Rosier2014-11-181-2/+3
| | | | | | | | | shift-right for booleans (i1). Arithmetic shift-right immediate with sign-/zero-extensions also works for boolean values. Update the assert and the test cases to reflect that fact. llvm-svn: 222272
* [FastISel][AArch64] Also allow folding of sign-/zero-extend and logicalChad Rosier2014-11-181-2/+3
| | | | | | | | | shift-right for booleans (i1). Logical shift-right immediate with sign-/zero-extensions also works for boolean values. Update the assert and the test cases to reflect that fact. llvm-svn: 222270
* InstCombine: Fix another infinite loop caused by visitFPTruncDavid Majnemer2014-11-181-5/+4
| | | | | | | | | | We would attempt to replace an frem's operand with the same operand. This would cause InstCombine to think real work was done, causing InstCombine to enter an infinite loop. This fixes the second part of PR21576. llvm-svn: 222265
* [Hexagon] Adding A2_sub instructionColin LeMahieu2014-11-181-0/+2
| | | | | | Renaming test files. llvm-svn: 222263
* Revert "Revert r222040 because of bot failure."David Majnemer2014-11-181-6/+9
| | | | | | | This reverts commit r222203, reverting r222040 didn't end up turning the bot green. llvm-svn: 222261
* [FastISel][AArch64] Follow-up fix for "Fix shift-immediate emission for ↵Juergen Ributzka2014-11-181-17/+26
| | | | | | | | | | | "zero" shifts." Shifts also perform sign-/zero-extends to larger types, which requires us to emit an integer extend instead of a simple COPY. Related to PR21594. llvm-svn: 222257
* R600/SI: Move SIFixSGPRCopies to inst selector passesMatt Arsenault2014-11-181-7/+9
| | | | | | | | | | | | This should expose more of the actually used VALU instructions to the machine optimization passes. This also should help getting i1 handling into a better state. For not entirly understood reasons, this fixes the split-scalar-i64-add.ll test where a 64-bit add would only partially be moved to the VALU resulting in use of undefined VCC. llvm-svn: 222256
* [AArch64] Don't optimize all compare instructions.Juergen Ributzka2014-11-181-26/+51
| | | | | | | | | | | | | | | | "optimizeCompareInstr" converts compares (cmp/cmn) into plain sub/add instructions when the flags are not used anymore. This conversion is valid for most instructions, but not all. Some instructions that don't set the flags (e.g. sub with immediate) can set the SP, whereas the flag setting version uses the same encoding for the "zero" register. Update the code to also check for the return register before performing the optimization to make sure that a cmp doesn't suddenly turn into a sub that sets the stack pointer. I don't have a test case for this, because it isn't easy to trigger. llvm-svn: 222255
* Fix an incorrect chain operand when expanding INSERT_VECTOR operations ↵Owen Anderson2014-11-181-1/+1
| | | | | | | | through the stack. Patch by Daniil Troshkov! llvm-svn: 222254
* R600/SI: Make sure resource descriptors are always stored in SGPRsTom Stellard2014-11-181-2/+2
| | | | llvm-svn: 222253
* [Hexagon] Converting from ADD_rr to A2_add which has encoding bits.Colin LeMahieu2014-11-187-15/+128
| | | | | | Adding test to show correct instruction selection and encoding. llvm-svn: 222249
* [Reassociate] Rename local variable to not use same name as a memberChad Rosier2014-11-181-4/+4
| | | | | | variable. NFC. llvm-svn: 222248
* [FastISel][AArch64] Fix shift-immediate emission for "zero" shifts.Juergen Ributzka2014-11-181-6/+33
| | | | | | | | This change emits a COPY for a shift-immediate with a "zero" shift value. This fixes PR21594 where we emitted a shift instruction with an incorrect immediate operand. llvm-svn: 222247
* Test commit to verify that commit access works.Jozef Kolek2014-11-181-1/+1
| | | | llvm-svn: 222244
* Tweak EarlyCSE to recognize series of dead storesPhilip Reames2014-11-181-1/+1
| | | | | | | | | EarlyCSE is giving up on the current instruction immediately when it recognizes that the current instruction makes a previous store trivially dead. There's no reason to do this. Once the previous store has been deleted, it's perfectly legal to remember the value of the current store (for value forwarding) and the fact the store occurred (it could be dead too!). Reviewed by: Hal Differential Revision: http://reviews.llvm.org/D6301 llvm-svn: 222241
* InstCombine: Fold away tautological masked comparesDavid Majnemer2014-11-181-1/+1
| | | | | | | | | It is impossible for (x & INT_MAX) == 0 && x == INT_MAX to ever be true. While this sort of reasoning should normally live in InstSimplify, the machinery that derives this result is not trivial to split out. llvm-svn: 222230
* InstCombine: Clean up foldLogOpOfMaskedICmpsDavid Majnemer2014-11-181-16/+14
| | | | | | No functional change intended. llvm-svn: 222229
* Allow DwarfCompileUnit::constructImportedEntityDIE to instanciate a ↵Frederic Riss2014-11-181-0/+2
| | | | | | | | | | | | | | | GlobalVariable DIE. Usually global variables are in a retain list and instanciated before any call to constructImportedEntityDIE is made. This isn't true for forward declarations though. The testcase for this change is generated by a clang patched to emit such forward declarations (patch at http://reviews.llvm.org/D6173 which will land soon). The updated testcase tests more than just global variables, it now tests every type of 'using' clause we support. llvm-svn: 222217
* SimplifyCFG: Range'ify some for-loops. No functional change.Hans Wennborg2014-11-181-12/+13
| | | | llvm-svn: 222215
* IndVarSimplify: Allow LFTR to fire more oftenDavid Majnemer2014-11-181-1/+22
| | | | | | | | | | | | | I added a pessimization in r217102 to prevent miscompiles when the incremented induction variable was used in a comparison; it would be poison. Try to use the incremented induction variable more often when we can be sure that the increment won't end in poison. Differential Revision: http://reviews.llvm.org/D6222 llvm-svn: 222213
* IR: Sink MDNode::Hash down to GenericMDNode::HashDuncan P. N. Exon Smith2014-11-181-1/+1
| | | | | | Part of PR21532. llvm-svn: 222212
* IR: Move MDNode operands from the back to the frontDuncan P. N. Exon Smith2014-11-182-58/+45
| | | | | | | | | | | | | | | | | Having the operands at the back prevents subclasses from safely adding fields. Move them to the front. Instead of replicating the custom `malloc()`, `free()` and `DestroyFlag` logic that was there before, overload `new` and `delete`. I added calls to a new `GenericMDNode::dropAllReferences()` in `LLVMContextImpl::~LLVMContextImpl()`. There's a maze of callbacks happening during teardown, and this resolves them before we enter the destructors. Part of PR21532. llvm-svn: 222211
* Fix covered switch warningMichael J. Spencer2014-11-181-0/+1
| | | | llvm-svn: 222209
* Support ELF files of unknown type.Michael J. Spencer2014-11-184-0/+6
| | | | llvm-svn: 222208
* IR: Split MDNode into GenericMDNode and MDNodeFwdDeclDuncan P. N. Exon Smith2014-11-183-43/+57
| | | | | | | | | | | | | | | | | | | Split `MDNode` into two classes: - `GenericMDNode`, which is uniquable (and for now, always starts uniqued). Once `Metadata` is split from the `Value` hierarchy, this class will lose the ability to RAUW itself. - `MDNodeFwdDecl`, which is used for the "temporary" interface, is never uniqued, and isn't managed by `LLVMContext` at all. I've left most of the guts in `MDNode` for now, but I'll incrementally move things to the right places (or delete the functionality, as appropriate). Part of PR21532. llvm-svn: 222205
* Revert r222040 because of bot failure.Manman Ren2014-11-181-9/+6
| | | | | | | http://lab.llvm.org:8080/green/job/clang-Rlto_master/298/ Hopefully, bot will be green. llvm-svn: 222203
* Debug Info: In DIBuilder, the context field of a global variable is updated toManman Ren2014-11-183-6/+6
| | | | | | | | | | | use DIScopeRef. A paired commit at clang will follow to show cases where we will use an identifer for the context of a global variable. rdar://18958417 llvm-svn: 222195
* IR: Simplify uniquing for MDNodeDuncan P. N. Exon Smith2014-11-173-73/+82
| | | | | | | | | | | | | | | | | | Change uniquing from a `FoldingSet` to a `DenseSet` with custom `DenseMapInfo`. Unfortunately, this doesn't save any memory, since `DenseSet<T>` is a simple wrapper for `DenseMap<T, char>`, but I'll come back to fix that later. I used the name `GenericDenseMapInfo` to the custom `DenseMapInfo` since I'll be splitting `MDNode` into two classes soon: `MDNodeFwdDecl` for temporaries, and `GenericMDNode` for everything else. I also added a non-debug-info reduced version of a type-uniquing test that started failing on an earlier draft of this patch. Part of PR21532. llvm-svn: 222191
* Revert "ADT: correctly report isMSVCEnvironment for windows itanium"Reid Kleckner2014-11-172-2/+2
| | | | | | This reverts commit r222180. llvm-svn: 222188
* ADT: correctly report isMSVCEnvironment for windows itaniumSaleem Abdulrasool2014-11-172-2/+2
| | | | | | | The itanium environment on Windows uses MSVC and is a MSVC environment. Report this correctly. llvm-svn: 222180
* R600/SI: Don't copy flags when extracting subregMatt Arsenault2014-11-171-6/+8
| | | | | | | | | This was resulting in use of a register after a kill. For some reason this showed up as a problem in many tests when moving the SIFixSGPRCopies pass closer to instruction selection. llvm-svn: 222175
* R600/SI: Assume SIFixSGPRCopies makes changesMatt Arsenault2014-11-171-1/+2
| | | | | | I'm not sure if this was breaking anything. llvm-svn: 222174
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