| Commit message (Collapse) | Author | Age | Files | Lines |
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We still save an instruction when just the "and" part is replaced.
Also change the code to match comments more closely.
llvm-svn: 147753
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llvm-svn: 147752
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safely proven not to have been clobbered. No small test case possible.
llvm-svn: 147751
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merge the sign bit into the bit test.
This is common in bit field code, e.g. checking if the first or the last bit of a bit field is set.
llvm-svn: 147749
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llvm-svn: 147748
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llvm-svn: 147745
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the produce assembly when using CFI just a bit more readable.
llvm-svn: 147743
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Darwin doesn't do static, and ELF targets only support static.
llvm-svn: 147740
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llvm-svn: 147739
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is discouraged now.
llvm-svn: 147738
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llvm-svn: 147734
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llvm-svn: 147733
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subc, turn it into a sub. Turn (subc x, x) into 0 with no borrow. Turn (subc x, 0) into x with no borrow. Turn (subc -1, x) into (xor x, -1) with no borrow. Turn sube with no borrow in into subc.
llvm-svn: 147728
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Reserved registers don't have proper live ranges, their LiveInterval
simply has a snippet of liveness for each def. Virtual registers with a
single value that is a copy of a reserved register (typically %esp) can
be coalesced with the reserved register if the live range doesn't
overlap any reserved register defs.
When coalescing with a reserved register, don't modify the reserved
register live range. Just leave it as a bunch of dead defs. This
eliminates quadratic coalescer behavior in i386 functions with many
function calls.
PR11699
llvm-svn: 147726
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llvm-svn: 147725
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This will be more important as we extend the LSR pass in ways that don't rely on the formula solver. In particular, we need it for constructing IV chains.
llvm-svn: 147724
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This enables basic local CSE, giving us 20% smaller code for
consumer-typeset in -O0 builds.
<rdar://problem/10658692>
llvm-svn: 147720
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up so branch folding pass can't use the scavenger. :-( This doesn't breaks
anything currently. It just means targets which do not carefully update kill
markers cannot run post-ra scheduler (not new, it has always been the case).
We should fix this at some point since it's really hacky.
llvm-svn: 147719
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LoopSimplify may not run on some outer loops, e.g. because of indirect
branches. SCEVExpander simply cannot handle outer loops with no preheaders.
Fixes rdar://10655343 SCEVExpander segfault.
llvm-svn: 147718
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file error checking. Use that to error on an unfinished cfi_startproc.
The error is not nice, but is already better than a segmentation fault.
llvm-svn: 147717
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opportunities that only present themselves after late optimizations
such as tail duplication .e.g.
## BB#1:
movl %eax, %ecx
movl %ecx, %eax
ret
The register allocator also leaves some of them around (due to false
dep between copies from phi-elimination, etc.)
This required some changes in codegen passes. Post-ra scheduler and the
pseudo-instruction expansion passes have been moved after branch folding
and tail merging. They were before branch folding before because it did
not always update block livein's. That's fixed now. The pass change makes
independently since we want to properly schedule instructions after
branch folding / tail duplication.
rdar://10428165
rdar://10640363
llvm-svn: 147716
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exposed with an upcoming change will would delete the copy to return register
because there is no use! It's amazing anything works.
llvm-svn: 147715
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This eliminates a lot of constant pool entries for -O0 builds of code
with many global variable accesses.
This speeds up -O0 codegen of consumer-typeset by 2x because the
constant island pass no longer has to look at thousands of constant pool
entries.
<rdar://problem/10629774>
llvm-svn: 147712
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llvm-svn: 147711
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replaceCongruentPhis checkin.
llvm-svn: 147709
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llvm-svn: 147707
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Fixes rdar://10614894
llvm-svn: 147704
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llvm-svn: 147703
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llvm-svn: 147700
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llvm-svn: 147696
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to bleed from the eyes.
llvm-svn: 147695
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llvm-svn: 147694
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llvm-svn: 147693
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Experiments show this to be a small speedup for modern ARM cores.
llvm-svn: 147689
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isIVUserOrOperand.
llvm-svn: 147686
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llvm-svn: 147685
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llvm-svn: 147683
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llvm-svn: 147682
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llvm-svn: 147679
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llvm-svn: 147676
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llvm-svn: 147675
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lldb testsuite.
rdar://10652330
llvm-svn: 147673
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llvm-svn: 147667
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llvm-svn: 147654
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the debug type accelerator tables to contain the tag and a flag
stating whether or not a compound type is a complete type.
rdar://10652330
llvm-svn: 147651
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present in the bottom of the CFG triangle, as the transformation isn't
ever valuable if the branch can't be eliminated.
Also, unify some heuristics between SimplifyCFG's multiple
if-converters, for consistency.
This fixes rdar://10627242.
llvm-svn: 147630
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global initializers if there's an implied extension or truncation.
llvm-svn: 147625
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System V Application Binary Interface. This lets us use
-fvisibility-inlines-hidden with LTO.
Fixes PR11697.
llvm-svn: 147624
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code can incorrectly move the load across a store. This never
happens in practice today, but only because the current
heuristics accidentally preclude it.
llvm-svn: 147623
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llvm-svn: 147618
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