summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"Chris Lattner2010-09-223-42/+27
| | | | | | Teaching the code generator about CR8-15, how to rex them up, etc. llvm-svn: 114533
* fix rdar://8456417 - llvm-mc can't do basic mathChris Lattner2010-09-221-21/+22
| | | | llvm-svn: 114532
* add the missing aliases for fp stack cmovs, rdar://8456391Chris Lattner2010-09-221-0/+6
| | | | llvm-svn: 114531
* reimplement elf TLS support in terms of addressing modes, eliminating ↵Chris Lattner2010-09-224-58/+42
| | | | | | SegmentBaseAddress. llvm-svn: 114529
* Fix rdar://8456364 - llvm-mc rejects '%CS'Chris Lattner2010-09-221-8/+13
| | | | llvm-svn: 114528
* fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'Chris Lattner2010-09-221-0/+8
| | | | | | | | | -This line, and those below, will be ignored-- M test/MC/AsmParser/X86/x86_instructions.s M lib/Target/X86/AsmParser/X86AsmParser.cpp llvm-svn: 114527
* fix rdar://8456361 - llvm-mc rejects 'rep movsd'Chris Lattner2010-09-221-0/+6
| | | | llvm-svn: 114526
* convert the last 4 X86ISD nodes that should have memoperands to have them.Chris Lattner2010-09-224-41/+69
| | | | llvm-svn: 114523
* give X86ISD::FNSTCW16m a memoperand, since it touches memory. It onlyChris Lattner2010-09-223-16/+21
| | | | | | can access the stack due to how it is generated though. llvm-svn: 114522
* give FP_TO_INT16_IN_MEM and friends a memoperand. They are onlyChris Lattner2010-09-224-22/+29
| | | | | | used with stack slots, but hey, lets be safe. llvm-svn: 114521
* give VZEXT_LOAD a memory operand, it now works with segment registers.Chris Lattner2010-09-225-13/+14
| | | | llvm-svn: 114515
* revert r114386 now that address modes work correctly, we get a niceChris Lattner2010-09-221-4/+0
| | | | | | call through gs-relative memory now. llvm-svn: 114510
* give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace ↵Chris Lattner2010-09-213-10/+11
| | | | | | 256/257 llvm-svn: 114508
* OptimizeCompareInstr should avoid iterating pass the beginning of the MBB ↵Evan Cheng2010-09-211-1/+6
| | | | | | when the 'and' instruction is after the comparison. llvm-svn: 114506
* Add start of support for MC instruction printer of ARM jump tables. Filling inJim Grosbach2010-09-212-0/+74
| | | | | | the rest of it is next up. llvm-svn: 114500
* Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that ↵Owen Anderson2010-09-211-4/+0
| | | | | | | | this makes irrelevant, but add a new test for the new, improved functionality. llvm-svn: 114494
* Build the complement interval dupli after the split intervals instead ofJakob Stoklund Olesen2010-09-212-35/+145
| | | | | | | | | | | | | creating it before and subtracting split ranges. This way, the SSA update code in LiveIntervalMap can properly create and use new phi values in dupli. Now it is possible to create split regions where a value escapes along two different CFG edges, creating phi values outside the split region. This is a work in progress and probably quite broken. llvm-svn: 114492
* reimplement support for GS and FS relative address space matchingChris Lattner2010-09-213-57/+44
| | | | | | | | | | | | | | | | | by having X86DAGToDAGISel::SelectAddr get passed in the parent node of the operand match (the load/store/atomic op) and having it get the address space from that, instead of having special FS/GS addr mode operations that require duplicating the entire instruction set to support. This makes FS and GS relative accesses *far* more predictable and work much better. It also simplifies the X86 backend a bit, more to come. There is still a pending issue with nodes like ISD::PREFETCH and X86ISD::FLD, which really should be MemSDNode's but aren't. llvm-svn: 114491
* Fixed pr20314-2.c failure, added E, F, p constraint letters.John Thompson2010-09-211-6/+17
| | | | llvm-svn: 114490
* Rework passing parent pointers into complexpatterns, I forgotChris Lattner2010-09-211-27/+35
| | | | | | | | that complex patterns are matched after the entire pattern has a structural match, therefore the NodeStack isn't in a useful state when the actual call to the matcher happens. llvm-svn: 114489
* Move a sign-extend or a zero-extend of a load to the same basic block as theBob Wilson2010-09-211-1/+2
| | | | | | | load when the type of the load is not legal, even if truncates are not free. The load is going to be legalized to an extending load anyway. llvm-svn: 114488
* Clarify a comment.Bob Wilson2010-09-211-1/+1
| | | | llvm-svn: 114487
* If only user of a vreg is an copy instruction to export copy of vreg out of ↵Devang Patel2010-09-211-0/+23
| | | | | | | | | current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. Testcase is in r114476. This fixes radar 8412415. llvm-svn: 114478
* correct this logic.Chris Lattner2010-09-211-2/+2
| | | | llvm-svn: 114474
* Reimplement r114460 in target-independent DAGCombine rather than ↵Owen Anderson2010-09-213-23/+29
| | | | | | | | | target-dependent, by using the predicate to discover the number of sign bits. Enhance X86's target lowering to provide a useful response to this query. llvm-svn: 114473
* just like they can opt into getting the root of the pattern beingChris Lattner2010-09-211-1/+5
| | | | | | | matched, allow ComplexPatterns to opt into getting the parent node of the operand being matched. llvm-svn: 114472
* fix a long standing wart: all the ComplexPattern's were beingChris Lattner2010-09-2116-139/+126
| | | | | | | | | | | passed the root of the match, even though only a few patterns actually needed this (one in X86, several in ARM [which should be refactored anyway], and some in CellSPU that I don't feel like detangling). Instead of requiring all ComplexPatterns to take the dead root, have targets opt into getting the root by putting SDNPWantRoot on the ComplexPattern. llvm-svn: 114471
* Refix MSVC9 and upper_bound. It actually needs a fully symmetric comparator.Jakob Stoklund Olesen2010-09-211-7/+5
| | | | llvm-svn: 114469
* even though I'm about to rip it out, simplify the address mode stuffChris Lattner2010-09-212-28/+13
| | | | llvm-svn: 114468
* finish pushing MachinePointerInfo through selectiondags. At this point,Chris Lattner2010-09-212-16/+7
| | | | | | | I think I've audited all uses, so it should be dependable for address spaces, and the pointer+offset info should also be accurate when there. llvm-svn: 114464
* convert a couple more places to use the new getStore()Chris Lattner2010-09-213-11/+16
| | | | llvm-svn: 114463
* update a bunch of code to use the MachinePointerInfo version of getStore.Chris Lattner2010-09-2114-93/+87
| | | | llvm-svn: 114461
* When adding the carry bit to another value on X86, exploit the fact that the ↵Owen Anderson2010-09-211-0/+23
| | | | | | | | | | | carry-materialization (sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold the intermediate AND and the ADD into a single SUB. This fixes <rdar://problem/8449754>. llvm-svn: 114460
* Don't pollute the global namespace.Jakob Stoklund Olesen2010-09-211-0/+2
| | | | llvm-svn: 114459
* MSVC9 does not support upper_bound with an asymmetric comparator.Jakob Stoklund Olesen2010-09-211-6/+10
| | | | llvm-svn: 114455
* Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON loadBob Wilson2010-09-213-1/+66
| | | | | | and store intrinsics are represented with MemIntrinsicSDNodes. llvm-svn: 114454
* eliminate some uses of the getStore overload.Chris Lattner2010-09-213-41/+60
| | | | llvm-svn: 114453
* eliminate an old SelectionDAG::getTruncStore method, propagatingChris Lattner2010-09-218-93/+77
| | | | | | MachinePointerInfo around more. llvm-svn: 114452
* eliminate last SelectionDAG::getLoad old entrypoint, on to stores.Chris Lattner2010-09-213-22/+7
| | | | llvm-svn: 114450
* fix the code that infers SV info to be correct when dealingChris Lattner2010-09-211-28/+53
| | | | | | with an indexed load/store that has an offset in the index. llvm-svn: 114449
* Add LiveInterval::find and use it for most LiveRange searching operationsJakob Stoklund Olesen2010-09-211-68/+8
| | | | | | | | | | | | instead of calling lower_bound or upper_bound directly. This cleans up the search logic a bit because {lower,upper}_bound compare LR->start by default, and it is usually simpler to search LR->end. Funnelling all searches through one function also makes it possible to replace the search algorithm with something faster than binary search. llvm-svn: 114448
* Remove dead method.Jakob Stoklund Olesen2010-09-211-21/+0
| | | | llvm-svn: 114447
* propagate MachinePointerInfo through various uses of the oldChris Lattner2010-09-2111-297/+283
| | | | | | SelectionDAG::getExtLoad overload, and eliminate it. llvm-svn: 114446
* Fix errant printing of [v]ldm instructions that aren't a popJim Grosbach2010-09-211-32/+24
| | | | llvm-svn: 114445
* Simplify code.Benjamin Kramer2010-09-211-8/+6
| | | | llvm-svn: 114444
* continue MachinePointerInfo'izing, eliminating use of one of the oldChris Lattner2010-09-218-192/+192
| | | | | | getLoad overloads. llvm-svn: 114443
* convert dagcombine off the old form of getLoad. This fixes several bugs Chris Lattner2010-09-211-16/+18
| | | | | | with SVOffset computation. llvm-svn: 114442
* Make CreateComplexVariable independent of SmallVector.Benjamin Kramer2010-09-211-7/+6
| | | | llvm-svn: 114439
* simplify DAGCombiner::SimplifySelectOps step #2/2.Chris Lattner2010-09-211-55/+53
| | | | llvm-svn: 114437
* substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.Chris Lattner2010-09-211-85/+76
| | | | | | no functionality change (step #1) llvm-svn: 114436
OpenPOWER on IntegriCloud