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author | Evan Cheng <evan.cheng@apple.com> | 2010-09-21 23:49:07 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-09-21 23:49:07 +0000 |
commit | d757c88bbaa59fca27d3aa1bdeded133afc623d8 (patch) | |
tree | 3d991aa6012d8175959403512cec82fb07d9dcf8 /llvm/lib | |
parent | d64c3e7913af4cc9f19ec930b32b98a5cb3da45b (diff) | |
download | bcm5719-llvm-d757c88bbaa59fca27d3aa1bdeded133afc623d8.tar.gz bcm5719-llvm-d757c88bbaa59fca27d3aa1bdeded133afc623d8.zip |
OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison.
llvm-svn: 114506
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 56f911a7651..999153188d9 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1455,7 +1455,8 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, // Check that CPSR isn't set between the comparison instruction and the one we // want to change. - MachineBasicBlock::const_iterator I = CmpInstr, E = MI; + MachineBasicBlock::const_iterator I = CmpInstr, E = MI, + B = MI->getParent()->begin(); --I; for (; I != E; --I) { const MachineInstr &Instr = *I; @@ -1469,6 +1470,10 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, if (MO.getReg() == ARM::CPSR) return false; } + + if (I == B) + // The 'and' is below the comparison instruction. + return false; } // Set the "zero" bit in CPSR. |