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* Make $fp and $ra callee-saved registers and let PrologEpilogInserter handleAkira Hatanaka2011-05-205-101/+37
| | | | | | saving and restoring them. llvm-svn: 131745
* indvars: Prototyping Sign/ZeroExtend elimination without canonical IVs.Andrew Trick2011-05-203-110/+361
| | | | | | | | | | No functionality enabled by default. Use -disable-iv-rewrite. Extended IVUsers to keep track of the phi that represents the users' IV. Added the WidenIV transform to replace a narrow IV with a wide IV by doing a one-for-one replacement of IV users instead of expanding the SCEV expressions. [sz]exts are removed and truncs are inserted. llvm-svn: 131744
* Now that they're implemented, make the Win64 EH MCAsmStreamer methods callCharles Davis2011-05-201-0/+26
| | | | | | super. llvm-svn: 131743
* Revert accidental commit.Evan Cheng2011-05-203-10/+1
| | | | llvm-svn: 131739
* "Implement" the HandlerData Win64 EH method in the base MCStreamer.Charles Davis2011-05-201-2/+1
| | | | | | | | There's really nothing to implement. All this really does is swap to a pseudo-section that later gets written to the unwind info struct. That needs to be implemented in the object streamers. llvm-svn: 131734
* Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.Benjamin Kramer2011-05-202-2/+2
| | | | llvm-svn: 131730
* Remove noisy semicolons.Benjamin Kramer2011-05-202-2/+2
| | | | llvm-svn: 131724
* Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to ↵Cameron Zwarich2011-05-201-0/+5
| | | | | | | | preserve the phikill flag. llvm-svn: 131717
* indvars: minor cleanup in preparation for sign/zero extend elimination.Andrew Trick2011-05-201-18/+11
| | | | llvm-svn: 131716
* Fix bug in which nodes that write to argument registers do not get glued ↵Akira Hatanaka2011-05-201-11/+12
| | | | | | with the JALR node. Patch by Sasa Stankovic llvm-svn: 131714
* Remove code that creates unnecessary frame objects.Akira Hatanaka2011-05-201-4/+0
| | | | llvm-svn: 131711
* Define variables and functions in MipsFunctionInfo.Akira Hatanaka2011-05-201-1/+30
| | | | | | | This is the first of a series of patches that attempt to simplify handling of stack frame objects. llvm-svn: 131710
* Don't attempt to tail call optimize for Win64.Chad Rosier2011-05-201-6/+7
| | | | llvm-svn: 131709
* Revert r131664 and fix it in instcombine instead. rdar://9467055Evan Cheng2011-05-205-14/+14
| | | | llvm-svn: 131708
* Fix PR9955 by only attaching load memory operands to load instructions andCameron Zwarich2011-05-191-3/+37
| | | | | | | similarly for stores. Now "make check" passes with the MachineVerifier forced on with the VerifyCoalescing option! llvm-svn: 131705
* Add fast-isel support for zeroext and signext ret instructions on x86.Eli Friedman2011-05-191-5/+25
| | | | llvm-svn: 131689
* Looks like OS X assemblers (including MC) don't likeRafael Espindola2011-05-191-1/+2
| | | | | | | | | | foo: bar = foo .quad bar Avoid producing it. Fixes PR9951. llvm-svn: 131687
* Misc code refactorings:Rafael Espindola2011-05-193-19/+13
| | | | | | | * Remove unnecessary arguments now that ForceExpAbs is a method. * Use ForceExpAbs in EmitAbsValue. llvm-svn: 131683
* Oddly people want to use the 'r' constraint for fp constants on x86.Eric Christopher2011-05-191-1/+1
| | | | | | | Fixes rdar://9218925 Fixes PR9601 llvm-svn: 131682
* Implement the EndProlog Win64 EH method on the base MCStreamer.Charles Davis2011-05-191-2/+4
| | | | llvm-svn: 131679
* This fixes one divergence between LLVM and binutils for ARM in theJason W Kim2011-05-191-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | text section. Assume the following bit of annotated assembly: .section .data.rel.ro,"aw",%progbits .align 2 .LAlpha: .long startval(GOTOFF) .text .align 2 .type main,%function .align 4 main: ;;; assume "main" starts at offset 0x20 0x0 push {r11, lr} 0x4 movw r0, :lower16:(.LAlpha-(.LBeta+8)) ;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8) ;;; ==> (??? - ((16-4) + 8) = -20 0x8 movt r0, :upper16:(.LAlpha-(.LBeta+8)) ;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8) ;;; ==> (??? - ((16-8) + 8) = -16 0xc ... blah .LBeta: 0x10 add r0, pc, r0 0x14 ... blah .LGamma: 0x18 add r1, pc, r1 Above snippet results in the following relocs in the .o file for the first pair of movw/movt instructions 00000024 R_ARM_MOVW_PREL_NC .LAlpha 00000028 R_ARM_MOVT_PREL .LAlpha And the encoded instructions in the .o file for main: must be 00000020 <main>: 20: e92d4800 push {fp, lr} 24: e30f0fec movw r0, #65516 ; 0xffec i.e. -20 28: e34f0ff0 movt r0, #65520 ; 0xfff0 i.e. -16 However, llc (prior to this commit) generates the following sequence 00000020 <main>: 20: e92d4800 push {fp, lr} 24: e30f0fec movw r0, #65516 ; 0xffec - i.e. -20 28: e34f0fff movt r0, #65535 ; 0xffff - i.e. -1 What has to happen in the ArmAsmBackend is that if the relocation is PC relative, the 16 bits encoded as part of movw and movt must be both addends, not addresses. It makes sense to encode addresses by right shifting the value by 16, but the result is incorrect for PIC. i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case. This change agrees with what GNU as does, and makes the PIC code run. MC/ARM/elf-movt.s covers this case. llvm-svn: 131674
* Reapply r131605. This time with a fix, which is to use NoFolder.Devang Patel2011-05-191-30/+34
| | | | llvm-svn: 131673
* ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.Rafael Espindola2011-05-191-1/+2
| | | | | | | | Fixes PR9934. We really need to start tblgening the relocation info :-( llvm-svn: 131669
* Align i64 arguments to 64 bit boundaries.Akira Hatanaka2011-05-191-1/+7
| | | | llvm-svn: 131668
* Implement the Win64 EH prolog instruction methods on the base MCStreamer.Charles Davis2011-05-192-27/+43
| | | | | | I had to change the API slightly to avoid overloading issues. llvm-svn: 131666
* crc32 with 64-bit output zeros upper 32-bits. rdar://9467055Evan Cheng2011-05-191-0/+13
| | | | llvm-svn: 131664
* Update some currently-disabled code, preparing for eventual use.Stuart Hastings2011-05-191-6/+7
| | | | llvm-svn: 131663
* Increase number of available registers when target is MIPS32.Akira Hatanaka2011-05-192-3/+11
| | | | llvm-svn: 131660
* Add comment.Evan Cheng2011-05-191-0/+1
| | | | llvm-svn: 131659
* Simplify CC_MipsO32 and merge it with CC_MipsO32_VarArgs. Patch by Sasa ↵Akira Hatanaka2011-05-191-90/+28
| | | | | | Stankovic. llvm-svn: 131657
* Reapply 131644 including the missing header changes:Joerg Sonnenberger2011-05-192-8/+14
| | | | | | Introduce -fatal-assembler-warnings for the obvious purpose llvm-svn: 131655
* Reverting 131641 to investigate 'bot complaint.Stuart Hastings2011-05-193-21/+25
| | | | llvm-svn: 131654
* Revert r131644; it's breaking the build.Eli Friedman2011-05-192-14/+8
| | | | llvm-svn: 131653
* Turns out GAS does have Win64 EH directives. (It also supports WinCE EH.) MakeCharles Davis2011-05-192-43/+53
| | | | | | | | | ours compatible with GAS. In retrospect, I should have emailed binutils about this earlier. Thanks to Kai Tietz for pointing out that GAS already had SEH directives. llvm-svn: 131652
* 80 columns.Jim Grosbach2011-05-191-9/+12
| | | | llvm-svn: 131649
* Introduce -fatal-assembler-warnings for the obvious purposeJoerg Sonnenberger2011-05-192-8/+14
| | | | llvm-svn: 131644
* Fix data layout string. i64 is aligned to 64 bit boundaries.Akira Hatanaka2011-05-191-2/+3
| | | | llvm-svn: 131642
* Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer beStuart Hastings2011-05-193-25/+21
| | | | | | pseudos. rdar://problem/8614450 llvm-svn: 131641
* Use the correct register class for Cell varargs spilling. This fixes all of theCameron Zwarich2011-05-191-1/+1
| | | | | | verifier failures in the CodeGen/CellSPU tests. llvm-svn: 131631
* Fixed sdiv and udiv for <4 x i16>. The test from r125402 still applies for ↵Mon P Wang2011-05-191-7/+7
| | | | | | this change. llvm-svn: 131630
* Implement the StartChained and EndChained Win64 EH methods on MCStreamer.Charles Davis2011-05-191-13/+23
| | | | llvm-svn: 131629
* Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier.Cameron Zwarich2011-05-191-1/+2
| | | | llvm-svn: 131627
* Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointlessCameron Zwarich2011-05-193-5/+4
| | | | | | | | piclabel operand. The operand in the tablegen definition doesn't actually turn into an MI operand, so it just confuses anything checking the TargetInstrDesc for the number of operands. It suffices to just have an implicit def of LR. llvm-svn: 131626
* Reuse the TargetInstrDesc.Cameron Zwarich2011-05-191-2/+1
| | | | llvm-svn: 131625
* Implement the StartProc and EndProc Win64 EH methods on the base MCStreamer.Charles Davis2011-05-191-8/+29
| | | | | | Based largely on Rafael Espindola's work on CFI. Other methods soon to follow. llvm-svn: 131623
* revert 131605 to fix PR9946.Rafael Espindola2011-05-191-36/+31
| | | | llvm-svn: 131620
* Correctly constrain a register class when computing frame offsets, as the Thumb2Cameron Zwarich2011-05-191-0/+4
| | | | | | add instruction takes an rGPR. This fixes the last of PR8825. llvm-svn: 131619
* Revert r128961 because it didn't include a test and causes the verifier to failCameron Zwarich2011-05-191-5/+0
| | | | | | | | on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was fixed by r128961, but since there is no test or reference to a source file I have to revert it. llvm-svn: 131618
* Make the demanded bits/elements optimizations preserve debug line information.Eli Friedman2011-05-192-15/+23
| | | | | | I'm not sure this is quite ideal, but I can't really think of any better way to do it. llvm-svn: 131616
* Avoid a Twine that referenced a tmp (which proceded to go out of scope beforeJim Grosbach2011-05-191-5/+3
| | | | | | the Twine was used). llvm-svn: 131612
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