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* [SCEV] Try to order n-ary expressions in CompareValueComplexitySanjoy Das2016-10-311-10/+35
* [SCEV] In CompareValueComplexity, order global values by their nameSanjoy Das2016-10-301-0/+15
* [SCEV] Use auto for consistency with an upcoming change; NFCSanjoy Das2016-10-301-4/+4
* [DAG] x | x --> xSanjay Patel2016-10-301-0/+4
* [DAG] x & x --> xSanjay Patel2016-10-301-0/+4
* Revert r285517 due to build failures.Dorit Nuzman2016-10-301-59/+1
* [LoopVectorize] Make interleaved-accesses analysis less conservative aboutDorit Nuzman2016-10-301-1/+59
* [X86] Use intrinsics table for PMADDUBSW and PMADDWD so that we can use the l...Craig Topper2016-10-303-86/+57
* [ThinLTO] Use per-summary flag to prevent exporting locals used in inline asmTeresa Johnson2016-10-302-54/+30
* [ThinLTO] Correctly resolve linkonce when importing aliaseeTeresa Johnson2016-10-301-3/+8
* [X86] Don't use loadv2i64 on SSE version of PMULHRSW. Use memopv2i64 instead.Craig Topper2016-10-301-1/+1
* NativeFormatting.cpp: Fix build for mingw. Where would writePadding() be?NAKAMURA Takumi2016-10-291-1/+0
* [ThinLTO] Rename doPromoteLocalToGlobal to shouldPromoteLocalToGlobal (NFC)Teresa Johnson2016-10-291-3/+3
* [ThinLTO] Use NoPromote flag in summary during promotionTeresa Johnson2016-10-291-13/+19
* IR: Remove a no longer needed assert.Peter Collingbourne2016-10-291-5/+0
* [X86] Use intrinsics table for VPMULHRSW intrincis so that the legacy intrins...Craig Topper2016-10-293-12/+13
* [ValueTracking] recognize more variants of smin/smaxSanjay Patel2016-10-291-10/+18
* [InstCombine] re-use bitcasted compare operands in selects (PR28001)Sanjay Patel2016-10-291-0/+50
* [DAGCombiner] (REAPPLIED) Add vector demanded elements support to computeKnow...Simon Pilgrim2016-10-291-13/+111
* Fixed FMA + FNEG combine.Elena Demikhovsky2016-10-291-3/+13
* AMDGPU: Use 1/2pi inline imm on VIMatt Arsenault2016-10-297-14/+43
* AArch64DeadRegisterDefinitionsPass: Cleanup; NFCMatthias Braun2016-10-291-54/+53
* Define calculateDbgStreamSize for consistency.Rui Ueyama2016-10-291-1/+5
* [APFloat] Remove the redundent function body of uninitialized ctor, which sho...Tim Shen2016-10-291-4/+1
* Resubmit "Add support for advanced number formatting."Zachary Turner2016-10-292-93/+171
* [DAGCombiner] Fix a crash visiting `AND` nodes.Davide Italiano2016-10-281-1/+6
* AMDGPU/SI: Don't use non-0 waitcnt values when waiting on Flat instructionsTom Stellard2016-10-283-2/+27
* AMDGPU: Fix instruction flags for s_endpgmMatt Arsenault2016-10-281-2/+1
* Refactor DW_LNE_* into Dwarf.defAdrian Prantl2016-10-281-8/+6
* Refactor DW_LNS_* into Dwarf.defAdrian Prantl2016-10-281-13/+6
* Refactor DW_APPLE_PROPERTY_* into Dwarf.defAdrian Prantl2016-10-281-31/+6
* Refactor DW_CFA_* into Dwarf.defAdrian Prantl2016-10-281-32/+6
* Refactor all DW_FORM_* constants into Dwarf.defAdrian Prantl2016-10-281-34/+6
* [APFloat] Fix memory bugs revealed by MSanTim Shen2016-10-281-3/+8
* SDAG: Make sure we use an allocatable reg class when we create this vregJustin Bogner2016-10-281-0/+2
* AMDGPU: Add definitions for scalar store instructionsMatt Arsenault2016-10-287-23/+147
* AMDGPU: Rename glc operand typeMatt Arsenault2016-10-284-12/+12
* [NVPTX] Compute 'rem' using the result of 'div', if possible.Justin Lebar2016-10-281-0/+36
* Don't leave unused divs/rems sitting around in BypassSlowDivision.Justin Lebar2016-10-281-0/+8
* Don't claim the udiv created in BypassSlowDivision is exact.Justin Lebar2016-10-281-2/+1
* AMDGPU: Diagnose using too many SGPRsMatt Arsenault2016-10-283-8/+27
* Handle non-~0 lane masks on live-in registers in LivePhysRegsKrzysztof Parzyszek2016-10-281-2/+3
* SpeculativeExecution: Allow speculating more inst typesMatt Arsenault2016-10-281-0/+18
* AMDGPU: Fix using incorrect private resource with no allocationMatt Arsenault2016-10-283-48/+97
* Implement vector count leading/trailing bytes with zero lsb and vector parityNemanja Ivanovic2016-10-281-7/+14
* [ThinLTO] Use flags from summary when writing variable summary (NFC)Teresa Johnson2016-10-281-1/+1
* [MemorySSA] Add const to getClobberingMemoryAccess.George Burgess IV2016-10-281-3/+3
* Move the DWARF attribute constants into Dwarf.def and delete 300 lines of sil...Adrian Prantl2016-10-281-195/+6
* MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFCMatthias Braun2016-10-286-7/+6
* TargetPassConfig: Move addPass of IPRA RegUsageInfoProp down.Matthias Braun2016-10-281-3/+3
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