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* Remove some redundant LIS->hasInterval() checks.Jakob Stoklund Olesen2012-06-221-22/+0
| | | | | | | These functions only operate on virtual registers now, and they all have live ranges. llvm-svn: 159015
* Use MRI::isConstantPhysReg() to check remat feasibility.Jakob Stoklund Olesen2012-06-221-4/+8
| | | | | | | Don't depend on LiveIntervals::hasInterval() to determine if a physreg is reserved and constant. llvm-svn: 159013
* Use regunit liveness to guide LiveDebugVariables.Jakob Stoklund Olesen2012-06-221-5/+18
| | | | | | This should produce the same results as using physreg liveness directly. llvm-svn: 159009
* Remove LiveIntervals::trackingRegUnits().Jakob Stoklund Olesen2012-06-223-71/+13
| | | | | | | | | With regunit liveness permanently enabled, this function would always return true. Also remove now obsolete code for checking physreg interference. llvm-svn: 159006
* Revert remaining part of r93200: "Disable folding sext(trunc(x)) -> x"Jakob Stoklund Olesen2012-06-221-9/+4
| | | | | | | | | | | This fixes PR5997. These transforms were disabled because codegen couldn't deal with other uses of trunc(x). This is now handled by the peephole pass. This causes no regressions on x86-64. llvm-svn: 159003
* simplify code from previous commits (Thanks Duncan)Nuno Lopes2012-06-221-7/+2
| | | | llvm-svn: 158999
* Fixed r158979.Stepan Dyatkovskiy2012-06-222-4/+19
| | | | | | | | | | Original message: Performance optimizations: - SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges. - Optimized IntItem, added APInt value caching. - Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only. llvm-svn: 158997
* Remove another duplicated variable. We only need one to tell us if the linkerRafael Espindola2012-06-223-3/+1
| | | | | | knows dwarf or not. llvm-svn: 158993
* Fix a FIXME: DwarfRequiresRelocationForSectionOffset is the same asRafael Espindola2012-06-224-5/+3
| | | | | | DwarfUsesRelocationsAcrossSections. llvm-svn: 158992
* Revert commit 158979 (dyatkovskiy) since it is causing several buildbots toDuncan Sands2012-06-221-11/+2
| | | | | | | | | | | | | fail. Original commit message: Performance optimizations: - SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges. - Optimized IntItem, added APInt value caching. - Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only. On my machine these optimizations gave about 4-6% of compile-time improvement. llvm-svn: 158986
* Performance optimizations:Stepan Dyatkovskiy2012-06-221-2/+11
| | | | | | | | | | - SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges. - Optimized IntItem, added APInt value caching. - Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only. On my machine these optimizations gave about 4-6% of compile-time improvement. llvm-svn: 158979
* Use "NoItineraries" for processors with no itineraries.Andrew Trick2012-06-224-9/+2
| | | | | | | | This makes it explicit when ScoreboardHazardRecognizer will be used. "GenericItineraries" would only make sense if it contained real itinerary values and still required ScoreboardHazardRecognizer. llvm-svn: 158963
* Functions calling __builtin_eh_return must have a frame pointer.Jakob Stoklund Olesen2012-06-221-1/+1
| | | | | | | | | | | | | | The code in X86TargetLowering::LowerEH_RETURN() assumes that a frame pointer exists, but the frame pointer was forced by the presence of llvm.eh.unwind.init which isn't guaranteed. If llvm.eh.unwind.init is actually required in functions calling eh.return (is it?), we should diagnose that instead of emitting bad machine code. This should fix the dragonegg-x86_64-linux-gcc-4.6-test bot. llvm-svn: 158961
* ARM scheduling fix: don't guess at implicit operand latency.Andrew Trick2012-06-221-5/+9
| | | | | | | | | | This is a minor drive-by fix with no robust way to unit test. As an example see neon-div.ll: SU(16): %Q8<def> = VMOVLsv4i32 %D17, pred:14, pred:%noreg, %Q8<imp-use,kill> val SU(1): Latency=2 Reg=%Q8 ...should be latency=1 llvm-svn: 158960
* ARM scheduling fix: compute predicated implicit use properly.Andrew Trick2012-06-221-3/+1
| | | | | | | | Minor drive by fix to cleanup latency computation. Calling getOperandLatency with a deliberately incorrect operand index does not give you the latency you want. llvm-svn: 158959
* Emit relocations for DW_AT_location entries on systems which need it. This isNick Lewycky2012-06-224-13/+18
| | | | | | a recommit of r127757. Fixes PR9493. Patch by Paul Robinson! llvm-svn: 158957
* Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from aLang Hames2012-06-223-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | boolean flag to an enum: { Fast, Standard, Strict } (default = Standard). This option controls the creation by optimizations of fused FP ops that store intermediate results in higher precision than IEEE allows (E.g. FMAs). The behavior of this option is intended to match the behaviour specified by a soon-to-be-introduced frontend flag: '-ffuse-fp-ops'. Fast mode - allows formation of fused FP ops whenever they're profitable. Standard mode - allow fusion only for 'blessed' FP ops. At present the only blessed op is the fmuladd intrinsic. In the future more blessed ops may be added. Strict mode - allow fusion only if/when it can be proven that the excess precision won't effect the result. Note: This option only controls formation of fused ops by the optimizers. Fused operations that are explicitly requested (e.g. FMA via the llvm.fma.* intrinsic) will always be honored, regardless of the value of this option. Internally TargetOptions::AllowExcessFPPrecision has been replaced by TargetOptions::AllowFPOpFusion. llvm-svn: 158956
* Convert the PPC backend to use the new FMA infrastructure.Hal Finkel2012-06-224-42/+48
| | | | | | | The existing contraction patterns are replaced with fma/fneg. Overall functionality should be the same. llvm-svn: 158955
* fix whitespace in my last commit.Nuno Lopes2012-06-221-1/+1
| | | | | | sorry for the churn :S enough for today; going to sleep. llvm-svn: 158953
* remove extractMallocCallFromBitCast, since it was tailor maded for its sole ↵Nuno Lopes2012-06-222-10/+5
| | | | | | user. Update GlobalOpt accordingly. llvm-svn: 158952
* instcombine: disable optimization of 'invoke null/undef'. I'll move this ↵Nuno Lopes2012-06-211-11/+11
| | | | | | | | functionality to SimplifyCFG (since we cannot make changes to the CFG here). Fixes the crashes with the attached test case llvm-svn: 158951
* Look pass zext to strength reduce an udiv. Patch by David Majnemer. ↵Evan Cheng2012-06-211-1/+4
| | | | | | rdar://11721329 llvm-svn: 158946
* The inline asm operand modifier 'n' is suppose Jack Carter2012-06-211-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | to be generic across architectures. It has the following description in the gnu sources: Negate the immediate constant Several Architectures such as x86 have local implementations of operand modifier 'n' which go beyond the above description slightly. This won't affect them. Affected files: lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Added 'n' to the switch cases. test/CodeGen/Generic/asm-large-immediate.ll Generic compiled test (x86 for me) test/CodeGen/Mips/asm-large-immediate.ll Mips compiled version of the generic one Contributer: Jack Carter llvm-svn: 158939
* Add support for invoke to the MemoryBuiltin analysid.Nuno Lopes2012-06-213-17/+29
| | | | | | | | Update comments accordingly. Make instcombine remove useless invokes to C++'s 'new' allocation function (test attached). llvm-svn: 158937
* 1. fix null program output after some other changesAkira Hatanaka2012-06-213-9/+30
| | | | | | | | | 2. re-enable null.ll test 3. fix some minor style violations Patch by Reed Kotler. llvm-svn: 158935
* Treat TargetGlobalAddress as a constant for the purpose of matching pre-inc ↵Hal Finkel2012-06-211-1/+6
| | | | | | | | stores on PPC. Thanks to Tobias von Koch for pointing out this problem. llvm-svn: 158932
* fix build in C++11 mode.Nuno Lopes2012-06-211-7/+7
| | | | | | Thanks to Chandler for pointing out the problem. llvm-svn: 158928
* Fix potential crash if DAGCombine on stores sees a half typePete Cooper2012-06-211-1/+2
| | | | llvm-svn: 158927
* The inline asm operand modifier 'c' is suppose Jack Carter2012-06-212-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to be generic across architectures. It has the following description in the gnu sources: Substitute immediate value without immediate syntax Several Architectures such as x86 have local implementations of operand modifier 'c' which go beyond the above description slightly. To make use of the generic modifiers without overriding local implementation one can make a call to the base class method for AsmPrinter::PrintAsmOperand() in the locally derived method's "default" case in the switch statement. That way if it is already defined locally the generic version will never get called. This change is needed when test/CodeGen/generic/asm-large-immediate.ll failed on a native Mips board. The test was assuming a generic implementation was in place. Affected files: lib/Target/Mips/MipsAsmPrinter.cpp: Changed the default case to call the base method. lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Added 'c' to the switch cases. test/CodeGen/Mips/asm-large-immediate.ll Mips compiled version of the generic one Contributer: Jack Carter llvm-svn: 158925
* hopefully fix the buildbots: some tests have wrong definitions of malloc ↵Nuno Lopes2012-06-211-3/+5
| | | | | | and were crashing this code on 64 bits machines llvm-svn: 158923
* port the BoundsChecking patch to the new MemoryBuiltin API (i.e., remove ↵Nuno Lopes2012-06-211-393/+30
| | | | | | | | most of the code from here). Remove the alloc_size.ll test until we settle on a metadata format that makes everyone happy.. llvm-svn: 158920
* refactor the MemoryBuiltin analysis:Nuno Lopes2012-06-219-281/+552
| | | | | | | | | | | | - provide more extensive set of functions to detect library allocation functions (e.g., malloc, calloc, strdup, etc) - provide an API to compute the size and offset of an object pointed by Move a few clients (GVN, AA, instcombine, ...) to the new API. This implementation is a lot more aggressive than each of the custom implementations being replaced. Patch reviewed by Nick Lewycky and Chandler Carruth, thanks. llvm-svn: 158919
* Add a number of threshold arguments to the SRA pass.Nadav Rotem2012-06-211-18/+60
| | | | | | A patch by Tom Stellard with minor changes. llvm-svn: 158918
* Add a missing llvm.fma -> VFNMS pattern to the ARM backend.Lang Hames2012-06-211-0/+8
| | | | llvm-svn: 158902
* Emit a single _udivmodsi4 libcall instead of two separate _udivsi3 andEvan Cheng2012-06-211-5/+7
| | | | | | | | _umodsi3 libcalls if they have the same arguments. This optimization was apparently broken if one of the node was replaced in place. rdar://11714607 llvm-svn: 158900
* Update regunits in RegisterCoalescer::reMaterializeTrivialDef.Jakob Stoklund Olesen2012-06-211-6/+4
| | | | | | Old code would only update physreg live intervals. llvm-svn: 158881
* Remove spurious typedefs.Jakob Stoklund Olesen2012-06-201-3/+0
| | | | llvm-svn: 158878
* Remove the RenderMachineFunction HTML output pass.Jakob Stoklund Olesen2012-06-206-1374/+0
| | | | | | | I don't think anyone has been using this functionality for a while, and it is getting in the way of refactoring now. llvm-svn: 158876
* Remove the -live-regunits command line option.Jakob Stoklund Olesen2012-06-201-12/+4
| | | | | | Register allocators depend on it being permanently enabled now. llvm-svn: 158873
* Fix some more LiveInterval enumerations.Jakob Stoklund Olesen2012-06-202-13/+12
| | | | | | Deterministically enumerate the virtual registers instead. llvm-svn: 158872
* Remove LiveIntervalUnions from RegAllocBase.Jakob Stoklund Olesen2012-06-204-167/+14
| | | | | | They are living in LiveRegMatrix now. llvm-svn: 158868
* Convert RAGreedy to LiveRegMatrix interference checking.Jakob Stoklund Olesen2012-06-204-92/+169
| | | | | | | | | | | | | | | | | Stop depending on the LiveIntervalUnions in RegAllocBase, they are about to be removed. The changes are mostly replacing register alias iterators with regunit iterators, and querying LiveRegMatrix instrad of RegAllocBase. InterferenceCache is converted to work with per-regunit LiveIntervalUnions, and it checks fixed regunit interference separately, using the fixed live intervals provided by LiveIntervalAnalysis. The local splitting helper calcGapWeights() is also considering fixed regunit interference which is kept on the side now. llvm-svn: 158867
* Convert RABasic to using LiveRegMatrix interference checking.Jakob Stoklund Olesen2012-06-203-69/+67
| | | | | | | Stop using the LiveIntervalUnions provided by RegAllocBase, they will be removed soon. llvm-svn: 158866
* Enable register unit liveness by default.Jakob Stoklund Olesen2012-06-201-1/+1
| | | | | | Soon we won't need to compute live intervals for physical registers. llvm-svn: 158865
* Teach PBQPBuilder::build() about regunit interference.Jakob Stoklund Olesen2012-06-201-33/+31
| | | | | | | Filter out physreg candidates with regunit interferrence. Also compute regmask interference more efficiently. llvm-svn: 158864
* Avoid iterating with LiveIntervals::iterator.Jakob Stoklund Olesen2012-06-203-41/+45
| | | | | | | | | | That is a DenseMap iterator keyed by pointers, so the iteration order is nondeterministic. I would like to replace the DenseMap with an IndexedMap which doesn't allow iteration. llvm-svn: 158856
* Revert r158846.Akira Hatanaka2012-06-202-128/+166
| | | | llvm-svn: 158855
* In MipsDisassembler.cpp, instead of defining register class tables, use the onesAkira Hatanaka2012-06-202-166/+128
| | | | | | | | | | | that are generated by TableGen and are already available in MipsGenRegisterInfo.inc. Suggested by Jakob Stoklund Olesen. Also, fix bug in function DecodeAFGR64RegisterClass. Patch by Vladimir Medic. llvm-svn: 158846
* Remove an "else" that snuck in after a "return" ;)Kaelyn Uhrain2012-06-201-1/+1
| | | | llvm-svn: 158844
* Check that a file is not a directory before reading it into a MemoryBuffer.Kaelyn Uhrain2012-06-201-0/+9
| | | | llvm-svn: 158841
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