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* Revert r137871. The loop simplify pass should require all exits from a loop thatBill Wendling2011-08-181-15/+3
| | | | | | aren't from an indirect branch need to be dominated by the loop header. llvm-svn: 137981
* Split out the updating of PHI nodes after splitting the BB into a separateBill Wendling2011-08-181-43/+53
| | | | | | function. llvm-svn: 137979
* Use this fantzy ArrayRef thing to pass in the list of predecessors.Bill Wendling2011-08-181-9/+14
| | | | llvm-svn: 137978
* Make IsShiftedMask a static function rather than defining it in anAkira Hatanaka2011-08-181-16/+14
| | | | | | anonymous namespace. llvm-svn: 137975
* The edge from DISubprogram to DICompileUnit has been removed in recent versionsNick Lewycky2011-08-181-1/+1
| | | | | | of debug info. llvm-svn: 137972
* Thumb assembly parsing and encoding for CMP.Jim Grosbach2011-08-181-1/+1
| | | | llvm-svn: 137963
* Use static instead of anonymous namespace.Bill Wendling2011-08-181-7/+4
| | | | llvm-svn: 137959
* Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.Jim Grosbach2011-08-182-25/+28
| | | | llvm-svn: 137956
* Rip out the old StructType APIs as warned about on llvmdev last week.Chris Lattner2011-08-181-38/+0
| | | | llvm-svn: 137953
* ARM Thumb blx instruction fixup has same data range as bl.Jim Grosbach2011-08-181-1/+1
| | | | | | | | | These fixups are handled poorly in general, and should have a single contiguous range of bits per fixup type, but that's not how they're currently organized, so for now in complex ones like for blx, we just tell the emitter it's OK for the fixup to munge any bit it wants. llvm-svn: 137947
* 80 columns.Jim Grosbach2011-08-181-1/+1
| | | | llvm-svn: 137946
* Clenup and fix encoding for Mips ins and ext instructionBruno Cardoso Lopes2011-08-181-17/+13
| | | | llvm-svn: 137943
* Add missing 'break'.Jim Grosbach2011-08-181-0/+1
| | | | llvm-svn: 137941
* Add intrinsics for SETEV, GETED, GETET.Richard Osborne2011-08-181-7/+21
| | | | llvm-svn: 137938
* Remove unused variable.Duncan Sands2011-08-181-1/+0
| | | | llvm-svn: 137933
* Split out the analysis updating code into a helper function. No intendedBill Wendling2011-08-181-63/+78
| | | | | | functionality change. llvm-svn: 137926
* Cleanup vector logical ops in AVX and add use int versions for simpleBruno Cardoso Lopes2011-08-181-20/+20
| | | | | | v2i64 llvm-svn: 137919
* Dramatically speedup codegen prepare by a) avoiding use of dominator tree ↵Devang Patel2011-08-181-16/+38
| | | | | | and b) doing a separate pass over dbg.value instructions. llvm-svn: 137908
* Remove extraneous newline from operand print method. PR10569.Jim Grosbach2011-08-171-3/+3
| | | | llvm-svn: 137900
* Clean up patterns for Thumb1 system instructions.Jim Grosbach2011-08-171-24/+18
| | | | llvm-svn: 137897
* Changed definition of EXT and INS per Bruno's comments.Akira Hatanaka2011-08-173-39/+29
| | | | llvm-svn: 137892
* Thumb assembly parsing and encoding for B.Jim Grosbach2011-08-171-0/+4
| | | | llvm-svn: 137891
* Do not use DebugInfoFinder. Extract debug info directly from llvm.dbg.cu ↵Devang Patel2011-08-171-159/+162
| | | | | | named mdnode. llvm-svn: 137890
* Thumb assembly parsing and encoding for ASR.Jim Grosbach2011-08-171-1/+1
| | | | llvm-svn: 137889
* Atomic load/store handling for the passes using memdep (GVN, DSE, memcpyopt).Eli Friedman2011-08-173-9/+11
| | | | llvm-svn: 137888
* Fix PR10688. Add support for spliting 256-bit vector shifts when theBruno Cardoso Lopes2011-08-171-11/+20
| | | | | | shift amount is variable llvm-svn: 137885
* Tidy up. 80 columns.Jim Grosbach2011-08-171-34/+49
| | | | llvm-svn: 137881
* Add the support in code-gen for the landingpad instruction lowering.Bill Wendling2011-08-172-3/+70
| | | | | | | | | | The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION SDNodes. The information from the landingpad instruction is harvested by the 'AddLandingPadInfo' function. The new EH uses the current EH scheme in the back-end. This will change once we switch over to the new scheme. (Reviewed by Jakob!) llvm-svn: 137880
* ARM clean up the imm_sr operand class representation.Jim Grosbach2011-08-178-29/+36
| | | | | | | | | Represent the operand value as it will be encoded in the instruction. This allows removing the specialized encoder and decoder methods entirely. Add an assembler match class while we're at it to lay groundwork for parsing the thumb shift instructions. llvm-svn: 137879
* Disable PRE for landing pads.Bill Wendling2011-08-171-2/+14
| | | | | | | | PRE needs the landing pads to have their critical edges split. Doing this for a landing pad is non-trivial. Abandon the attempt to perform PRE when we come across a landing pad. (Reviewed by Owen!) llvm-svn: 137876
* Revert patch. Forgot a dependent commit.Bill Wendling2011-08-171-39/+3
| | | | llvm-svn: 137875
* Add the body of 'visitLandingPad'.Bill Wendling2011-08-171-3/+39
| | | | | | | | This generates the SDNodes for the new exception handling scheme. It takes the two values coming from the landingpad instruction and assigns them to the EXCEPTIONADDR and EHSELECTION nodes. llvm-svn: 137873
* Increment the insertion iterator to beyond the landingpad instruction.Bill Wendling2011-08-171-1/+1
| | | | llvm-svn: 137872
* Don't optimize the landing pad exit block.Bill Wendling2011-08-171-4/+18
| | | | | | | | One way to exit the loop is through an unwind edge. However, that may involve splitting the critical edge of the landing pad, which is non-trivial. Prevent the transformation from rewriting the landing pad exit loop block. llvm-svn: 137871
* Assert that we aren't trying to split the critical edge of a landing pad. DoingBill Wendling2011-08-171-0/+5
| | | | | | so requires more care than this generic algorithm should handle. llvm-svn: 137866
* Fix predicate for imm1_32Jim Grosbach2011-08-171-1/+4
| | | | llvm-svn: 137865
* Thumb assembly parsing and encoding for ADR.Jim Grosbach2011-08-171-1/+1
| | | | llvm-svn: 137864
* Revert r137655. There is some question about whether the 'landingpad'Bill Wendling2011-08-173-3/+5
| | | | | | instruction should be marked as potentially reading and/or writing memory. llvm-svn: 137863
* 80 columns.Jim Grosbach2011-08-171-1/+2
| | | | llvm-svn: 137857
* Tidy up.Jim Grosbach2011-08-171-2/+1
| | | | llvm-svn: 137856
* Modify for the new EH scheme.Bill Wendling2011-08-171-1/+57
| | | | | | | | Things are much saner now. We no longer need to modify the laning pads, because of the invariants we impose upon them. The only thing DwarfEHPrepare needs to do is convert the 'resume' instruction into a call to '_Unwind_Resume'. llvm-svn: 137855
* Revert r137781; I agree with Duncan's comment that the situation in question ↵Eli Friedman2011-08-171-5/+4
| | | | | | is clearly impossible given the current structure of the code. llvm-svn: 137853
* Add support for half-word unaligned loads and stores.Akira Hatanaka2011-08-173-14/+31
| | | | llvm-svn: 137848
* Static fields require an out-of-line definition. Fix DynamicLibrary for real.Jordy Rose2011-08-171-0/+2
| | | | llvm-svn: 137844
* Be more careful in the Thumb decoder hooks to avoid walking off the end of ↵Owen Anderson2011-08-171-8/+12
| | | | | | the OpInfo array. llvm-svn: 137838
* Silly mistake from r137777; restore significant isStructTy() checks. While ↵Eli Friedman2011-08-171-4/+19
| | | | | | | | | | here, be a bit more defensive with unknown instructions. Fixes PR10687. llvm-svn: 137836
* Move pattern matching for EXT and INS to post-legalization DAGCombine per ↵Akira Hatanaka2011-08-172-98/+102
| | | | | | Bruno's comment. llvm-svn: 137831
* Allow the MCDisassembler to return a "soft fail" status code, indicating an ↵Owen Anderson2011-08-176-630/+698
| | | | | | | | instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment. Patch by James Molloy. llvm-svn: 137830
* Introduce matching patterns for vbroadcast AVX instruction. The idea is toBruno Cardoso Lopes2011-08-174-0/+66
| | | | | | | | | | | | | match splats in the form (splat (scalar_to_vector (load ...))) whenever the load can be folded. All the logic and instruction emission is working but because of PR8156, there are no ways to match loads, cause they can never be folded for splats. Thus, the tests are XFAILed, but I've tested and exercised all the logic using a relaxed version for checking the foldable loads, as if the bug was already fixed. This should work out of the box once PR8156 gets fixed since MayFoldLoad will work as expected. llvm-svn: 137810
* Update comments about vector splat handling in x86Bruno Cardoso Lopes2011-08-171-8/+7
| | | | llvm-svn: 137808
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