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* Null-initialize to shut up -Wuninitialized warnings.Eli Friedman2011-09-011-1/+1
| | | | llvm-svn: 138974
* Fix apparent build error caused by r138948 on certain versions of GCC with ↵James Molloy2011-09-012-21/+36
| | | | | | -Werror. Sorry for the inconvenience. llvm-svn: 138973
* Reduce indentation. No functionality change.Bill Wendling2011-09-011-17/+18
| | | | llvm-svn: 138968
* Change worklist driven deletion to be an iterative process.Bill Wendling2011-09-012-42/+12
| | | | | | Duncan noticed this! llvm-svn: 138967
* Fix an issue with the IR sink pass found by inspection. (I'm not sure ↵Eli Friedman2011-09-011-7/+6
| | | | | | anyone is actually using this, but might as well fix it since I found the issue.) llvm-svn: 138965
* Fix the build for us -Werror users.Nick Lewycky2011-09-012-37/+24
| | | | | | | Remove broken emacs mode major notation marking a C++ file as C. No functionality change. llvm-svn: 138963
* Make isSafeToSpeculativelyExecute() return the right answer for some new ↵Eli Friedman2011-09-011-0/+4
| | | | | | instructions. Found by inspection; not sure what practical impact, if any, this has. llvm-svn: 138962
* Permit remat of partial register defs when it is safe.Jakob Stoklund Olesen2011-09-011-5/+10
| | | | | | | | | | | | | | | | | An instruction may define part of a register where the other bits are undefined. In that case, it is safe to rematerialize the instruction. For example: %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def> The extra <imp-def> operand indicates that the instruction does not read the other parts of the virtual register, so a remat is safe. This patch simply allows multiple def operands for the virtual register. It is MI->readsVirtualRegister() that determines if we depend on a previous value so remat is impossible. llvm-svn: 138953
* ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code.Jim Grosbach2011-09-011-1/+1
| | | | llvm-svn: 138952
* Fix vbroadcast matching logic to early unmatch if the node doesn't haveBruno Cardoso Lopes2011-09-011-1/+5
| | | | | | only one use. Fix PR10825. llvm-svn: 138951
* Fix up r137380 based on post-commit review by Jim Grosbach.James Molloy2011-09-013-612/+627
| | | | llvm-svn: 138948
* t2Bcc is allowed to have a predicate without a preceding IT instruction.Owen Anderson2011-09-011-1/+2
| | | | llvm-svn: 138946
* Revert r138794, "Do not try to rematerialize a value from a partial definition."Jakob Stoklund Olesen2011-09-011-22/+1
| | | | | | | | | The problem is fixed for all register allocators by r138944, so this patch is no longer necessary. <rdar://problem/10032939> llvm-svn: 138945
* Prevent remat of partial register redefinitions.Jakob Stoklund Olesen2011-09-011-0/+9
| | | | | | | | | | | | | An instruction that redefines only part of a larger register can never be rematerialized since the virtual register value depends on the old value in other parts of the register. This was fixed for the inline spiller in r138794. This patch fixes the problem for all register allocators, and includes a small test case. <rdar://problem/10032939> llvm-svn: 138944
* Teach MachineLICM reg pressure tracking code to deal with MVT::untyped. ↵Evan Cheng2011-09-011-27/+40
| | | | | | Sorry, I can't come up with a small test case. rdar://10043690 llvm-svn: 138934
* Resubmit with fix. Properly remove the instructions except for landingpad, ↵Bill Wendling2011-09-011-9/+28
| | | | | | which should be removed only when its invokes are. llvm-svn: 138932
* Submitted this too early.Bill Wendling2011-09-011-5/+0
| | | | llvm-svn: 138931
* Don't DCE the landingpad instruction.Bill Wendling2011-09-011-0/+5
| | | | | | The landingpad instruction can be removed only when its invokes are removed. llvm-svn: 138930
* PreRA scheduler should avoid cloning compares.Andrew Trick2011-09-011-1/+35
| | | | | | | | | Added canClobberReachingPhysRegUse() to handle a particular pattern in which a two-address instruction could be forced to interfere with EFLAGS, causing a compare to be unnecessarilly cloned. Fixes rdar://problem/5875261 llvm-svn: 138924
* Don't forget to add the landingpad and resume instructions to the ↵Bill Wendling2011-09-011-0/+2
| | | | | | | | InstructionList. This was found via a nightly build of 483.xalancbmk. llvm-svn: 138923
* Thumb2 assembly parsing and encoding for ADD(immediate).Jim Grosbach2011-09-012-6/+50
| | | | llvm-svn: 138922
* Fixup for functions that return a bool.Chad Rosier2011-08-311-2/+2
| | | | llvm-svn: 138918
* Static relocation model Thumb jump table interworking.Jim Grosbach2011-08-311-0/+5
| | | | | | | Make sure the low bit of the PC is set when loading an address directly for jump tables in static relocation model. llvm-svn: 138912
* The asm parser currently selects the wrong encoding for non-conditional ↵Owen Anderson2011-08-312-5/+6
| | | | | | Thumb2 branches. However, this exposed a number of situations where the decoder was too permissive in allowing invalid instructions to decode successful. Specify additional fixed bits to close those gaps. llvm-svn: 138910
* Fix Size TypingDavid Greene2011-08-311-1/+1
| | | | | | Stores sizes as uint64_t to avoid possible truncation. llvm-svn: 138901
* Thumb2 t2Bcc should encode as t2B when condition is 'always'.Jim Grosbach2011-08-311-0/+5
| | | | llvm-svn: 138898
* Move more code around and duplicate AVX patterns: MOVHPS and MOVLPSBruno Cardoso Lopes2011-08-311-109/+216
| | | | llvm-svn: 138897
* Move MOVAPS,MOVUPS patterns close to the instructions definitionBruno Cardoso Lopes2011-08-311-88/+92
| | | | llvm-svn: 138896
* Remove "_Int" forms of MOVUPSmr and MOVAPSmrBruno Cardoso Lopes2011-08-311-16/+13
| | | | llvm-svn: 138895
* Make sure we aren't deleting the landingpad instruction.Bill Wendling2011-08-311-5/+21
| | | | | | | | | The landingpad instruction is required in the landing pad block. Because we're not deleting terminating instructions, the invoke may still jump to here (see Transforms/SCCP/2004-11-16-DeadInvoke.ll). Remove all uses of the landingpad instruction, but keep it around until code-gen can remove the basic block. llvm-svn: 138890
* Fix encoding for tBcc with immediate offset operand.Owen Anderson2011-08-311-1/+5
| | | | llvm-svn: 138889
* Misc cleanup; addresses Duncan's comments on r138877.Eli Friedman2011-08-314-22/+17
| | | | llvm-svn: 138887
* When performing instruction selection for LDR_PRE_IMM/LDRB_PRE_IMM, we still ↵Owen Anderson2011-08-311-1/+8
| | | | | | | | need to preserve the sign of the index. This fixes miscompilations of Quicksort in the nightly testsuite, and hopefully others as well. <rdar://problem/10046188> llvm-svn: 138885
* Remove FIXME. Thumb2 MOV instruction will use separate custom tricks.Jim Grosbach2011-08-311-3/+1
| | | | | | | | When we want encoding T3 (the wide encoding), we can explicitly check for that and twiddle the CanAcceptCarrySet accordingly. For now, just correctly handle encodings T1 and T2 when in Thumb2 mode. llvm-svn: 138879
* Fill in type legalization for MERGE_VALUES in all the various cases. Patch ↵Eli Friedman2011-08-316-18/+77
| | | | | | by Micah Villmow. (No testcase because the issue only showed up in an out-of-tree backend.) llvm-svn: 138877
* Fix roundtripping of Thumb BL/BLX instructions with immediate offsets ↵Owen Anderson2011-08-311-3/+31
| | | | | | instead of labels. llvm-svn: 138874
* tBcc is OK to be predicated in Thumb2 outside of IT blocks (obviously).Jim Grosbach2011-08-311-2/+2
| | | | llvm-svn: 138873
* Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; ↵Eli Friedman2011-08-312-0/+33
| | | | | | implements 64-bit atomic load/store for ARM. llvm-svn: 138872
* Thumb2 parsing and encoding for ADC(register).Jim Grosbach2011-08-311-1/+22
| | | | | | | Also add instruction aliases for non-.w versions of SBC since they're the same. llvm-svn: 138871
* After r138010, subroutine type does not have context info. Update type ↵Devang Patel2011-08-311-0/+1
| | | | | | | | verifier accordingly. This fixes ptype.exp gdb testsuite regressions. llvm-svn: 138869
* 64-bit atomic cmpxchg for ARM.Eli Friedman2011-08-314-37/+93
| | | | llvm-svn: 138868
* Fix typo. Patch by Liu.Akira Hatanaka2011-08-311-1/+1
| | | | llvm-svn: 138866
* Compress Repeated Byte OutputDavid Greene2011-08-311-3/+59
| | | | | | | Emit a repeated sequence of bytes using .zero. This saves an enormous amount of asm file space for certain programs. llvm-svn: 138864
* Tweak Thumb1 ADD encoding selection a bit.Jim Grosbach2011-08-311-2/+5
| | | | | | | | When the destination register of an add immediate instruction is explicitly specified, encoding T1 is preferred, else encoding T2 is preferred. llvm-svn: 138862
* Put VMOVS widening under a command line option, off by default.Jakob Stoklund Olesen2011-08-311-1/+6
| | | | | | | | | | | It appears that our use of the imp-use and imp-def flags with sub-registers is not yet robust enough to support this. The failing test case is complicated, I am working on a reduction. <rdar://problem/10044201> llvm-svn: 138861
* Spelling and grammar fixes to problems found by Duncan.Rafael Espindola2011-08-312-6/+6
| | | | llvm-svn: 138858
* Make sure we don't crash when -miphoneos-version-min is specified on x86. ↵Eli Friedman2011-08-311-1/+2
| | | | | | Hopefully this will fix gcc testsuite failures. llvm-svn: 138856
* Rework this conditional a bit.Eric Christopher2011-08-311-6/+10
| | | | | | Patch by Sanjoy Das llvm-svn: 138853
* - Move all MOVSS and MOVSD patterns close to their definitionsBruno Cardoso Lopes2011-08-312-144/+239
| | | | | | | | - Duplicate some store patterns to their AVX forms! - Catched a bug while restricting the patterns subtarget, fix it and update a testcase to check it properly llvm-svn: 138851
* Remove unnecessary AVX checksBruno Cardoso Lopes2011-08-311-3/+3
| | | | llvm-svn: 138850
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