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* AMDGPU: Fix assert when erroring on a callMatt Arsenault2016-05-181-1/+5
| | | | | | | For some reason an assert is now hit when a valid chain is not returned, so return the entry chain. llvm-svn: 269948
* Trivial cleanups.Rafael Espindola2016-05-1811-22/+22
| | | | | | | This just clang formats and cleans comments in an area I am about to post a patch for review. llvm-svn: 269946
* AMDGPU: Handle alloca promoting with null operandsMatt Arsenault2016-05-181-2/+37
| | | | | | | If the second pointer in a multi-pointer instruction is a constant, we can replace the type. llvm-svn: 269945
* AMDGPU: Don't run passes that aren't usefulMatt Arsenault2016-05-181-0/+5
| | | | llvm-svn: 269943
* AMDGPU: Fix assert on ttmp registersMatt Arsenault2016-05-181-2/+2
| | | | | | | | | | | Use register class that does not include them when looking for unallocated registers. This is hit by the udiv v8i64 test in the opencl integer conformance test, and takes a few seconds to compile in a debug build so no test included. llvm-svn: 269938
* [PM] Port per-function SCCP to the new pass manager.Davide Italiano2016-05-184-45/+55
| | | | llvm-svn: 269937
* [Hexagon] Recognize "q" and "v" in inline-asm as register constraintsKrzysztof Parzyszek2016-05-182-2/+16
| | | | llvm-svn: 269933
* [WebAssembly] Don't expand divisions by constants.Dan Gohman2016-05-182-0/+7
| | | | | | | Don't expand divisions by constants if it would require multiple instructions. The current assumption is that engines will perform the desired optimizations. llvm-svn: 269930
* [SystemZ] Fix register ordering for BinaryRRF instructionsBryan Chan2016-05-181-2/+2
| | | | | | | | | | | | | | | | | Summary: The ordering of registers in BinaryRRF instructions are wrong, and affects the copysign instruction (CPSDR). This results in the wrong magnitude and sign being set. Author: zhanjunl Reviewers: kbarton, uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20308 llvm-svn: 269922
* Removing an unused variable introduced in r269911; NFC.Aaron Ballman2016-05-181-1/+0
| | | | llvm-svn: 269915
* Try again to fix pdbdump-headers.test on big-endian hosts after r269861.Daniel Sanders2016-05-181-5/+9
| | | | | | | r269898 fixed the problem with HashBuckets but the same issue occurred with AddressMap and ThunkMap too. llvm-svn: 269913
* Add new flag and intrinsic support for MWAITX and MONITORX instructionsAshutosh Nema2016-05-188-15/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT pair while adding a timer function, such that another termination of the MWAITX instruction occurs when the timer expires. The presence of the MONITORX and MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29. The MONITORX and MWAITX instructions are intercepted by the same bits that intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be monitored. MWAITX instruction causes the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events. Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is "0F 01 FB". These opcode information is used in adding tests for the disassembler. These instructions are enabled for AMD's bdver4 architecture. Patch by Ganesh Gopalasubramanian! Reviewers: echristo, craig.topper, RKSimon Subscribers: RKSimon, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D19795 llvm-svn: 269911
* Don't pass a Reloc::Model to MC.Rafael Espindola2016-05-187-28/+29
| | | | | | | | | | | | MC only needs to know if the output is PIC or not. It never has to decide about creating GOTs and PLTs for example. The only thing that MC itself uses this information for is expanding "macros" in sparc and mips. The rest I am pretty sure could be moved to CodeGen. This is a cleanup and isolates the code from future changes to Reloc::Model. llvm-svn: 269909
* [VectorUtils] Fix nasty use-after-freeJames Molloy2016-05-181-1/+3
| | | | | | | | | | In truncateToMinimalBitwidths() we were RAUW'ing an instruction then erasing it. However, that intruction could be cached in the map we're iterating over. The first check is "I->use_empty()" which in most cases would return true, as the (deleted) object was RAUW'd first so would have zero use count. However in some cases the object could have been polluted or written over and this wouldn't be the case. Also it makes valgrind, asan and traditionalists who don't like their compiler to crash sad. No testcase as there are no externally visible symptoms apart from a crash if the stars align. Fixes PR26509. llvm-svn: 269908
* [AVR] Remove the 'AVRConfig.h' headerDylan McKay2016-05-187-27/+0
| | | | | | | | | | It defined the LLVM_AVR_GCC_COMPAT constant, which would enable/disable certain GCC-specific behaviours. There is no point conditionally turning it on/off, as it will always be turned on, and we have to maintain both code paths anyway. llvm-svn: 269904
* [AVR] Add missing CMake dependenciesDylan McKay2016-05-182-6/+8
| | | | llvm-svn: 269901
* [AVR] Fix a few compile errorsDylan McKay2016-05-183-5/+4
| | | | llvm-svn: 269900
* [PATCH] [mips] Restrict the creation of compact branchesSimon Dardis2016-05-184-2/+47
| | | | | | | | | | | | | | | | | Restrict the creation of compact branches so that they do meet the ISA requirements. Notably do not permit $zero to be used as a operand for compact branches and ensure that some other branches fulfil the requirement that rs != rt. Fixup cases where $rs > $rt for bnec and beqc. Recommit of rL269893 with reviewers comments. Reviewers: dsanders, vkalintiris Differential Review: http://reviews.llvm.org/D20284 llvm-svn: 269899
* Attempt to fix pdbdump-headers.test on big-endian hosts after r269861.Daniel Sanders2016-05-181-2/+6
| | | | llvm-svn: 269898
* Revert "[mips] Restrict the creation of compact branches"Simon Dardis2016-05-184-47/+2
| | | | | | | | This reverts commit rL269893. Incorrect patch applied. llvm-svn: 269897
* [AVR] Convert C style comments to C++Dylan McKay2016-05-187-27/+11
| | | | llvm-svn: 269895
* [mips] Restrict the creation of compact branchesSimon Dardis2016-05-184-2/+47
| | | | | | | | | | | | | | | Restrict the creation of compact branches so that they meet the ISA encoding requirements. Notably do not permit $zero to be used as a operand for compact branches and ensure that some other branches fulfil the requirement that rs != rt. Fixup cases where $rs > $rt for bnec and beqc. Reviewers: dsanders, vkalintiris Differential Review: http://reviews.llvm.org/D20284 llvm-svn: 269893
* [Sparc] Add Soft Float supportChris Dewhurst2016-05-187-12/+59
| | | | | | | | | | This change adds support for software floating point operations for Sparc targets. This is the first in a set of patches to enable software floating point on Sparc. The next patch will enable the option to be used with Clang. Differential Revision: http://reviews.llvm.org/D19265 llvm-svn: 269892
* [Coverage] Ensure that coverage mapping data has an expected alignment in ↵Igor Kudrin2016-05-181-0/+7
| | | | | | | | | | | | | 'covmapping' files. Coverage mapping data is organized in a sequence of blocks, each of which is expected to be aligned by 8 bytes. This feature is used when reading those blocks, see VersionedCovMapFuncRecordReader::readFunctionRecords(). If a misaligned covearge mapping data has more than one block, it causes llvm-cov to fail. Differential Revision: http://reviews.llvm.org/D20285 llvm-svn: 269887
* [AVX512] Strengthen type constraints on my rounding mode inputs and some ↵Craig Topper2016-05-181-16/+23
| | | | | | immediate inputs. llvm-svn: 269886
* [AVX512] Strengthen type checks on the X86ISD::SELECT node. Saves over 800 ↵Craig Topper2016-05-182-6/+16
| | | | | | bytes in the DAG isel table by removing type checks for the condition operand which is always a vector or scalar of i1 matching the the number of elements in the other operands. llvm-svn: 269885
* [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add ↵Zlatko Buljan2016-05-184-18/+41
| | | | | | | | CodeGen support Differential Revision: http://reviews.llvm.org/D15418 llvm-svn: 269883
* [RuntimeDyld] Thread Error through some APIs, remove calls to ↵Lang Hames2016-05-184-58/+18
| | | | | | report_fatal_error. llvm-svn: 269881
* [codeview] Some cleanup of Symbol Records.Zachary Turner2016-05-172-16/+22
| | | | | | | | | | | | | | * Reworks the CVSymbolTypes.def to work similarly to TypeRecords.def. * Moves some enums from SymbolRecords.h to CodeView.h to maintain consistency with how we do type records. * Generalize a few simple things like the record prefix * Define the leaf enum and the kind enum similar to how we do with tyep records. Differential Revision: http://reviews.llvm.org/D20342 Reviewed By: amccarth, rnk llvm-svn: 269867
* Revert "[obj2yaml] [yaml2obj] Support MachO section and section_64Zachary Turner2016-05-171-24/+2
| | | | | | | | | structs" This reverts commits r269845, r269846, and r269850 as they introduce a crash in obj2yaml when trying to do a roundtrip. llvm-svn: 269865
* [WebAssembly] Rename $discard to $drop in the assembly output.Dan Gohman2016-05-174-13/+12
| | | | llvm-svn: 269862
* pdbdump: Print out more strcutures.Rui Ueyama2016-05-171-3/+39
| | | | | | | | | | I don't yet fully understand the meaning of these data strcutures, but at least it seems that their sizes and types are correct. With this change, we can read publics streams till end. Differential Revision: http://reviews.llvm.org/D20343 llvm-svn: 269861
* [DwarfDebug] Make tuning predicates private, should be used only in ctor.Paul Robinson2016-05-171-9/+10
| | | | llvm-svn: 269859
* [WebAssembly] Model the stack evaluation order more precisely.Dan Gohman2016-05-171-20/+40
| | | | | | | | | | | We currently don't represent get_local and set_local explicitly; they are just implied by virtual register use and def. This avoids a lot of clutter, but it does complicate stackifying: get_locals read their operands at their position in the stack evaluation order, rather than at their parent instruction. This patch adds code to walk the stack to determine the precise ordering, when needed. llvm-svn: 269854
* Delete deprecated function.Rafael Espindola2016-05-171-6/+0
| | | | llvm-svn: 269853
* [Object] Move isNotObjectErrorInvalidFileType out of header.Lang Hames2016-05-171-0/+18
| | | | llvm-svn: 269848
* [PM] Port DSE to the new pass managerJustin Bogner2016-05-174-322/+342
| | | | | | Patch by JakeVanAdrighem. Thanks! llvm-svn: 269847
* [obj2yaml][yaml2obj] Fixing dyld_info_command mappingsChris Bieneman2016-05-171-2/+4
| | | | | | Apparently I mucked up the mappings here, which was causing some binary differences in round tripping. llvm-svn: 269846
* [obj2yaml] [yaml2obj] Support MachO section and section_64 structsChris Bieneman2016-05-171-0/+20
| | | | | | This patch adds round trip support for MachO section structs. llvm-svn: 269845
* Remove unnecessary header include.Lang Hames2016-05-171-1/+0
| | | | llvm-svn: 269844
* [WebAssembly] Don't stackify calls past stack pointer modifications.Dan Gohman2016-05-172-20/+41
| | | | llvm-svn: 269843
* Debug Info: Introduce a DwarfDebug::UseDWARF2Bitfields flagAdrian Prantl2016-05-173-6/+13
| | | | | | | | | instead of having DwarfUnit query the debugger tuning options. Follow-up commmit to r269827. Thanks to Paul Robinson for pointing this out! llvm-svn: 269840
* minor cleanup /NFCXinliang David Li2016-05-171-4/+2
| | | | llvm-svn: 269839
* Revert r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"Hans Wennborg2016-05-179-332/+38
| | | | | | Seems to have broken the Windows ASan bot. Reverting while investigating. llvm-svn: 269833
* [InstCombine] add another test for wrong icmp constant (PR27792)Sanjay Patel2016-05-171-1/+1
| | | | | | It doesn't matter if the comparison is unsigned; the inc/dec is always signed. llvm-svn: 269831
* [WebAssembly] Stackify induction variable increment instructions.Dan Gohman2016-05-171-28/+65
| | | | | | | This handles instructions where the defined register is also used, as in "x = x + 1". llvm-svn: 269830
* Simple refactoring /NFCXinliang David Li2016-05-171-8/+15
| | | | llvm-svn: 269829
* X86: Avoid using _chkstk when lowering WIN_ALLOCA instructionsHans Wennborg2016-05-179-38/+332
| | | | | | | | | | | | | | | This patch moves the expansion of WIN_ALLOCA pseudo-instructions into a separate pass that walks the CFG and lowers the instructions based on a conservative estimate of the offset between the stack pointer and the lowest accessed stack address. The goal is to reduce binary size and run-time costs by removing calls to _chkstk. While it doesn't fix all the code quality problems with inalloca calls, it's an incremental improvement for PR27076. Differential Revision: http://reviews.llvm.org/D20263 llvm-svn: 269828
* Debug Info: Don't emit bitfields in the DWARF4 format when tuning for GDB.Adrian Prantl2016-05-171-6/+11
| | | | | | | As discovered in PR27758, GDB does not fully support the DWARF 4 format. This patch ensures we always emit bitfields in the DWARF 2 when tuning for GDB. llvm-svn: 269827
* Fix an assert in SelectionDAGBuilder when processing inline asmRenato Golin2016-05-172-25/+30
| | | | | | | | | | | | | | When processing inline asm that contains errors, make sure we can recover gracefully by creating an UNDEF SDValue for the inline asm statement before returning from SelectionDAGBuilder::visitInlineAsm. This is necessary for consumers that don't exit on the first error that is emitted (e.g. clang) and that would assert later on. Fixes PR24071. Patch by Diana Picus. llvm-svn: 269811
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