| Commit message (Collapse) | Author | Age | Files | Lines |
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only one unknown bit.
int test1(unsigned x) { return (x&8) ? 0 : -1; }
int test3(unsigned x) { return (x&8) ? -1 : 0; }
before (x86_64):
_test1:
andl $8, %edi
cmpl $1, %edi
sbbl %eax, %eax
ret
_test3:
andl $8, %edi
cmpl $1, %edi
sbbl %eax, %eax
notl %eax
ret
after:
_test1:
shrl $3, %edi
andl $1, %edi
leal -1(%rdi), %eax
ret
_test3:
shll $28, %edi
movl %edi, %eax
sarl $31, %eax
ret
llvm-svn: 128732
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functionality change.
llvm-svn: 128731
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llvm-svn: 128730
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should improve src line debug info when sdisel is used. rdar://9199118
llvm-svn: 128728
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handles delay slots correctly.
llvm-svn: 128724
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$addrmode_imm12 => (ops GPR:$base, i32imm:$offsimm).
rdar://problem/9219356
llvm-svn: 128722
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llvm-svn: 128718
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llvm-svn: 128709
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list of operands. Simplify and rename them accordingly.
llvm-svn: 128708
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had gotten out of sync: isCastable didn't think it was possible to
cast the x86_mmx type to anything, while it did think it possible
to cast an i64 to x86_mmx.
llvm-svn: 128705
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rdar://8911343
llvm-svn: 128696
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llvm-svn: 128692
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all LDR/STR changes and left them to a future patch. Passing all
checks now.
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
fix the encoding wherever is possible.
- Add a new encoding bit to describe the index mode used and teach
printAddrMode2Operand to check by the addressing mode which index
mode to print.
- Testcases
llvm-svn: 128689
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It is using a trivial rewriter that doesn't know how to insert spill code
requested by the standard spiller.
llvm-svn: 128688
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The LocalStackSlotAllocation pass was creating illegal registers.
llvm-svn: 128687
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llvm-svn: 128683
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even try.
Thanks Eli!
llvm-svn: 128676
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accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2
llvm-svn: 128665
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Inst{4} = 0.
rdar://problem/9213022
llvm-svn: 128662
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handling of FP comparisons.
llvm-svn: 128650
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liveness.
Turn them into noop KILL instructions instead. This lets the scavenger know when
super-registers are killed and defined.
llvm-svn: 128645
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A8.6.23 BLX (immediate)
rdar://problem/9212921
llvm-svn: 128644
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llvm-svn: 128643
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This way, shrinkToUses() will ignore the instruction that is about to be
deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like.
Fix a misunderstanding in MachineVerifier about <def,undef> operands. The
<undef> flag is valid on def operands where it has the same meaning as <undef>
on a use operand. It only applies to sub-register defines which also read the
full register.
llvm-svn: 128642
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llvm-svn: 128639
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llvm-svn: 128635
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llvm-svn: 128634
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llvm-svn: 128633
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- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
{STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible.
- Move all instructions which use am2offset without a pattern to use
addrmode2.
- Add a new encoding bit to describe the index mode used and teach
printAddrMode2Operand to check by the addressing mode which index
mode to print.
- Testcases
llvm-svn: 128632
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std::pow(float,float) here.
We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts).
For consistency, std::pow(double,double) may be called instead.
Or, precision issue might attack us, to see unstable regalloc and stack coloring.
llvm-svn: 128629
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Thanks Frits!
llvm-svn: 128628
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llvm-svn: 128627
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llvm-svn: 128626
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losslessly converted to the type of x.
Fixes PR9592.
llvm-svn: 128625
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llvm-svn: 128624
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The rematerialized instruction may require a more constrained register class
than the register being spilled. In the test case, the spilled register has been
inflated to the DPR register class, but we are rematerializing a load of the
ssub_0 sub-register which only exists for DPR_VFP2 registers.
The register class is reinflated after spilling, so the conservative choice is
only temporary.
llvm-svn: 128610
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This revision introduced a dependency cycle, as nlewycky mentioned by email.
llvm-svn: 128597
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NEON instructions. With this fix, the entire test-suite passes with the Thumb integrated assembler.
llvm-svn: 128587
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llvm-svn: 128586
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{STR,LDC}{2}_PRE.
- Fixed the encoding in some places.
- Some of those instructions were using am2offset and now use addrmode2.
Codegen isn't affected, instructions which use SelectAddrMode2Offset were not
touched.
- Teach printAddrMode2Operand to check by the addressing mode which index
mode to print.
- This is a work in progress, more work to come. The idea is to change places
which use am2offset to use addrmode2 instead, as to unify assembly parser.
- Add testcases for assembly parser
llvm-svn: 128585
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can be recognized. This fixes <rdar://problem/9183078>.
llvm-svn: 128584
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that one of the numbers is signed while the other is unsigned. This could lead
to a wrong result when the signed was promoted to an unsigned int.
* Add the data layout line to the testcase so that it will test the appropriate
thing.
Patch by David Terei!
llvm-svn: 128577
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llvm-svn: 128574
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StringMap was not properly updating NumTombstones after a clear or rehash.
This was not fatal until now because the table was growing faster than
NumTombstones could, but with the previous change of preventing infinite
growth of the table the invariant (NumItems + NumTombstones <= NumBuckets)
stopped being observed, causing infinite loops in certain situations.
Patch by José Fonseca!
llvm-svn: 128567
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Rehash but don't grow when full of tombstones.
Patch by José Fonseca!
llvm-svn: 128566
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Rehash but don't grow when full of tombstones.
Patch by José Fonseca!
llvm-svn: 128565
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The rewriter can keep track of multiple stack slots in the same register if they
happen to have the same value. When an instruction modifies a stack slot by
defining a register that is mapped to a stack slot, other stack slots in that
register are no longer valid.
This is a very rare problem, and I don't have a simple test case. I get the
impression that VirtRegRewriter knows it is about to be deleted, inventing a
last opaque problem.
<rdar://problem/9204040>
llvm-svn: 128562
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change.
llvm-svn: 128561
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denormal multiplication.
Some platforms may treat denormals as zero, on other platforms multiplication
with a subnormal is slower than dividing by a normal.
llvm-svn: 128555
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fmul.
Fixes PR9587.
llvm-svn: 128546
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