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| author | Johnny Chen <johnny.chen@apple.com> | 2011-03-31 19:28:35 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2011-03-31 19:28:35 +0000 |
| commit | 7b203f9caedfbe94e165fa8f989f89ea876c0144 (patch) | |
| tree | 0c38b9e327049d502f9e00055ba39dfc0f0a0390 /llvm/lib | |
| parent | 5901ea7e671058b68f54f79e33bceded883b62cb (diff) | |
| download | bcm5719-llvm-7b203f9caedfbe94e165fa8f989f89ea876c0144.tar.gz bcm5719-llvm-7b203f9caedfbe94e165fa8f989f89ea876c0144.zip | |
Fix single word and unsigned byte data transfer instruction encodings so that
Inst{4} = 0.
rdar://problem/9213022
llvm-svn: 128662
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 77068222d6d..18127f398b9 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -991,6 +991,7 @@ multiclass AI_ldr1<bit isByte, string opc, InstrItinClass iii, [(set GPR:$Rt, (opnode ldst_so_reg:$shift))]> { bits<4> Rt; bits<17> shift; + let shift{4} = 0; // Inst{4} = 0 let Inst{23} = shift{12}; // U (add = ('U' == 1)) let Inst{19-16} = shift{16-13}; // Rn let Inst{15-12} = Rt; @@ -1020,6 +1021,7 @@ multiclass AI_str1<bit isByte, string opc, InstrItinClass iii, [(opnode GPR:$Rt, ldst_so_reg:$shift)]> { bits<4> Rt; bits<17> shift; + let shift{4} = 0; // Inst{4} = 0 let Inst{23} = shift{12}; // U (add = ('U' == 1)) let Inst{19-16} = shift{16-13}; // Rn let Inst{15-12} = Rt; |
