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* [LoopVer] Optionally allow using memchecks from LAAAdam Nemet2015-08-121-0/+9
* 80-cols; NFCSanjay Patel2015-08-121-2/+2
* [ValueTracking] Tweak a comment slightlyJames Molloy2015-08-121-2/+2
* fix typo; NFCSanjay Patel2015-08-121-1/+1
* Redo "Make global aliases have symbol size equal to their type"John Brawn2015-08-121-0/+14
* [GlobalMerge] Only emit aliases for internal linkage variables for non-Mach-OJohn Brawn2015-08-121-3/+10
* [mips][microMIPS] Create microMIPS64r6 subtarget and implement DALIGN, DAUI, ...Zoran Jovanovic2015-08-128-9/+192
* [X86] Disable mul -> shl + lea combine when compiling for minsizeMichael Kuperstein2015-08-121-0/+4
* [X86] Allow x86 call frame optimization to fold more loads into pushesMichael Kuperstein2015-08-123-9/+10
* AMDGPU: Fix assert on dbg_value instructionsMatt Arsenault2015-08-121-0/+6
* unused variable warning fix.Simon Pilgrim2015-08-121-1/+1
* [InstCombine] Move SSE/AVX vector blend folding to instcombinerSimon Pilgrim2015-08-122-60/+17
* X86: hoist a condition into a variable (NFC)Saleem Abdulrasool2015-08-121-7/+8
* [libFuzzer] add two flags, -tbm_depth and -tbm_width to control how the trace...Kostya Serebryany2015-08-127-12/+31
* [libFuzzer] add colons to the stats output to avoid confusionKostya Serebryany2015-08-121-2/+3
* [libFuzzer] use raw C IO to reduce the risk of a deadlock in a signal handler.Kostya Serebryany2015-08-121-2/+5
* [x86] enable machine combiner reassociations for 256-bit vector FP mul/addSanjay Patel2015-08-121-0/+4
* PseudoSourceValue: Transform the mips subclass to target independent subclassesAlex Lorenz2015-08-113-82/+51
* PseudoSourceValue: Replace global manager with a manager in a machine function.Alex Lorenz2015-08-1148-532/+558
* PseudoSourceValue: Introduce a 'PSVKind' enumerator.Alex Lorenz2015-08-112-19/+22
* PseudoSourceValue: Update comments and fix lowercase variable names. NFC.Alex Lorenz2015-08-111-1/+1
* Reformat PseudoSourceValue.cpp and PseudoSourceValue.h. NFC.Alex Lorenz2015-08-111-29/+26
* Use 32-bit divides instead of 64-bit divides where possible.Mark Heffernan2015-08-111-0/+4
* Make DW_AT_[MIPS_]linkage_name optional, and off by default for SCE.Paul Robinson2015-08-113-1/+21
* Fix PR24354.Sanjoy Das2015-08-111-3/+2
* don't repeat function names in comments; NFCSanjay Patel2015-08-111-39/+34
* fix 80-cols; NFCSanjay Patel2015-08-111-19/+22
* NFC SelectionDAGDumper: fix typoJF Bastien2015-08-111-1/+1
* WebAssembly: implement comparison.JF Bastien2015-08-114-25/+36
* [x86] enable machine combiner reassociations for 128-bit vector single/double...Sanjay Patel2015-08-111-2/+6
* [LowerSwitch] Skip dead blocks for processSwitchInst()Chen Li2015-08-111-4/+10
* WebAssembly: implement WebAssemblyTargetLowering::getTargetNodeNameJF Bastien2015-08-112-1/+13
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-111-2/+1
* SelectionDAG: Prefer to combine multiplication with less uses for fmaJingyue Wu2015-08-111-0/+8
* [LowerSwitch] Fix a bug when LowerSwitch deletes the default blockChen Li2015-08-111-5/+10
* Use llvm::make_unique to fix the MSVC build.Rafael Espindola2015-08-111-1/+1
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-111-4/+3
* Enable EliminateAvailableExternally pass in the LTO pipeline.Teresa Johnson2015-08-111-0/+3
* Variable names should start with an upper case letter; NFCSanjay Patel2015-08-111-9/+9
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-111-7/+7
* [GlobalMerge] Use private linkage for MergedGlobals variablesJohn Brawn2015-08-111-25/+5
* fix code that was accidentally commented out in previous commitSanjay Patel2015-08-111-2/+2
* fix typos in comments; NFCSanjay Patel2015-08-111-5/+5
* fix typo in comment; NFCSanjay Patel2015-08-111-1/+1
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-111-3/+1
* [X86] Allow merging of immediates within a basic block for code size savingsMichael Kuperstein2015-08-113-7/+117
* [AArch64] Match fminnum/fmaxnum for vector fminnm/fmaxnm instead of an intrin...James Molloy2015-08-112-8/+17
* [AArch64] Replace the custom AArch64ISD::FMIN/MAX nodes with ISD::FMINNAN/MAXNANJames Molloy2015-08-113-19/+15
* [ARM] Match fminnan/fmaxnan for vector vmin/vmax instead of an intrinsicJames Molloy2015-08-112-4/+20
* [ARM] Match fminnum/fmaxnum for vector vminnm/vmaxnm instead of an intrinsicJames Molloy2015-08-112-4/+16
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