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* Rewrite the CMake build to use explicit dependencies between libraries,Chandler Carruth2011-07-2982-14/+666
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specified in the same file that the library itself is created. This is more idiomatic for CMake builds, and also allows us to correctly specify dependencies that are missed due to bugs in the GenLibDeps perl script, or change from compiler to compiler. On Linux, this returns CMake to a place where it can relably rebuild several targets of LLVM. I have tried not to change the dependencies from the ones in the current auto-generated file. The only places I've really diverged are in places where I was seeing link failures, and added a dependency. The goal of this patch is not to start changing the dependencies, merely to move them into the correct location, and an explicit form that we can control and change when necessary. This also removes a serialization point in the build because we don't have to scan all the libraries before we begin building various tools. We no longer have a step of the build that regenerates a file inside the source tree. A few other associated cleanups fall out of this. This isn't really finished yet though. After talking to dgregor he urged switching to a single CMake macro to construct libraries with both sources and dependencies in the arguments. Migrating from the two macros to that style will be a follow-up patch. Also, llvm-config is still generated with GenLibDeps.pl, which means it still has slightly buggy dependencies. The internal CMake 'llvm-config-like' macro uses the correct explicitly specified dependencies however. A future patch will switch llvm-config generation (when using CMake) to be based on these deps as well. This may well break Windows. I'm getting a machine set up now to dig into any failures there. If anyone can chime in with problems they see or ideas of how to solve them for Windows, much appreciated. llvm-svn: 136433
* Visit the landingpad instruction.Bill Wendling2011-07-281-1/+35
| | | | | | | | | This generates the correct SDNodes for the landingpad instruction. It makes an assumption that the result of the landingpad instruction has at least two values. And that the first value is a pointer to the exception object and the second value is the "selector." llvm-svn: 136430
* Add the AddLandingPadInfo function.Bill Wendling2011-07-281-0/+34
| | | | | | | AddLandingPadInfo takes a landingpad instruction and grabs all of the information from it that it needs for EH table generation. llvm-svn: 136429
* Change LBH_TAKEN_WEIGHT to 124 (from 128). Right now, sum ofJakub Staszak2011-07-281-4/+4
| | | | | | | LBH_TAKEN_WEIGHT + LBH_NONTAKEN_WEIGHT = 128 which in _most_ cases reduce number of rounding errors. llvm-svn: 136428
* PLD and PLI are not predicable in ARM mode.Jim Grosbach2011-07-281-0/+1
| | | | llvm-svn: 136427
* ARM assembly parsing and encoding for BLX (immediate).Jim Grosbach2011-07-282-2/+13
| | | | | | | | Add parsing support for BLX (immediate). Since the register operand version is predicated and the label operand version is not, we have to use some special handling to get the operand list right for matching. llvm-svn: 136406
* LangRef and basic memory-representation/reading/writing for 'cmpxchg' andEli Friedman2011-07-2812-1/+389
| | | | | | | | | | | | | | | | | | | | | 'atomicrmw' instructions, which allow representing all the current atomic rmw intrinsics. The allowed operands for these instructions are heavily restricted at the moment; we can probably loosen it a bit, but supporting general first-class types (where it makes sense) might get a bit complicated, given how SelectionDAG works. As an initial cut, these operations do not support specifying an alignment, but it would be possible to add if we think it's useful. Specifying an alignment lower than the natural alignment would be essentially impossible to support on anything other than x86, but specifying a greater alignment would be possible. I can't think of any useful optimizations which would use that information, but maybe someone else has ideas. Optimizer/codegen support coming soon. llvm-svn: 136404
* Heuristics are in descending priority now. If we use one of them, skip the rest.Jakub Staszak2011-07-281-13/+23
| | | | llvm-svn: 136402
* Handle REG_SEQUENCE with implicitly defined operands.Jakob Stoklund Olesen2011-07-281-0/+6
| | | | | | | | | | | | | Code like that would only be produced by bugpoint, but we should still handle it correctly. When a register is defined by a REG_SEQUENCE of undefs, the register itself is undef. Previously, we would create a register with uses but no defs. Fixes part of PR10520. llvm-svn: 136401
* ARM assembly parsing and encoding for BFC and BFI.Jim Grosbach2011-07-282-0/+106
| | | | | | | Add parsing support that handles converting the lsb+width source into the odd way we represent the instruction (an inverted bitfield mask). llvm-svn: 136399
* Add InEdges (edges from header to the loop) in Loop Branch Heuristics, soJakub Staszak2011-07-281-0/+17
| | | | | | | there is no frequency difference whether condition is in the header or in the latch. llvm-svn: 136398
* Use ArrayRef instead of requiring an std::vector.Bill Wendling2011-07-281-4/+6
| | | | llvm-svn: 136396
* The personality function should be a Function* and not just a Value*.Bill Wendling2011-07-285-9/+14
| | | | llvm-svn: 136392
* Reverse order of RS_Split live ranges under -compact-regions.Jakob Stoklund Olesen2011-07-281-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two conflicting strategies in play: - Under high register pressure, we want to assign large live ranges first. Smaller live ranges are easier to place afterwards. - Live range splitting is guided by interference, so splitting should be deferred until interference is as realistic as possible. With the recent changes to the live range stages, and with compact regions enabled, it is less traumatic to split a live range too early. If some of the split products were too big, they can often be split again. By reversing the RS_Split order, we get this queue order: 1. Normal live ranges, large to small. 2. RS_Split live ranges, large to small. The large-to-small order improves RAGreedy's puzzle solving skills under high register pressure. It may cause a bit more iterated splitting, but we handle that better now. With this change, -compact-regions is mostly an improvement on SPEC. llvm-svn: 136388
* Initial code to convert ResumeInsts into calls to _Unwind_Resume.Bill Wendling2011-07-281-1/+57
| | | | | | This should be the only code necessary for DWARF EH prepare. llvm-svn: 136387
* Add fixme.Jim Grosbach2011-07-281-1/+5
| | | | llvm-svn: 136375
* Update comments.Owen Anderson2011-07-281-18/+10
| | | | llvm-svn: 136367
* Fill in some encoding information for STRD instructions.Owen Anderson2011-07-281-3/+32
| | | | llvm-svn: 136366
* Revert r136295. It broke nightly testers because some parts of codegen ↵Owen Anderson2011-07-283-41/+23
| | | | | | weren't aware of the changes to operand ordering. I hope to revive this sometime in the future, but it's not strictly necessary for now. llvm-svn: 136362
* ARM parsing and encoding for ADR.Jim Grosbach2011-07-281-1/+1
| | | | | | The label does not have a '#' prefix. Add parsing and encoding tests. llvm-svn: 136360
* CR fix: The ANY_EXTEND can be removed because the input and putput type must beNadav Rotem2011-07-281-2/+1
| | | | | | identical. llvm-svn: 136355
* Some minor cleanups. No functionalitical change.Bill Wendling2011-07-281-17/+10
| | | | llvm-svn: 136341
* Leverage some of the code that John wrote to manage the landing pads.Bill Wendling2011-07-281-32/+56
| | | | | | | The new EH is more simple in many respects. Mainly, we don't have to worry about the "llvm.eh.exception" and "llvm.eh.selector" calls being in weird places. llvm-svn: 136339
* Don't add in the asked for size so that we don't copy too much from the old ↵Bill Wendling2011-07-281-3/+3
| | | | | | to new vectors. llvm-svn: 136338
* Automatically merge the landingpad clauses when we come across a callee'sBill Wendling2011-07-281-28/+12
| | | | | | landingpad. llvm-svn: 136329
* Explicitly declare a library dependency of LLVM*Desc toOscar Fuentes2011-07-286-0/+12
| | | | | | | | | | | | | | | | | | | LLVM*AsmPrinter. GenLibDeps.pl fails to detect vtable references. As this is the only referenced symbol from LLVM*Desc to LLVM*AsmPrinter on optimized builds, the algorithm that creates the list of libraries to be linked into tools doesn't know about the dependency and sometimes places the libraries on the wrong order, yielding error messages like this: ../../lib/libLLVMARMDesc.a(ARMMCTargetDesc.cpp.o): In function `llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)': ARMMCTargetDesc.cpp:(.text._ZN4llvm14ARMInstPrinterC1ERKNS_9MCAsmInfoE [llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)]+0x2a): undefined reference to `vtable for llvm::ARMInstPrinter' llvm-svn: 136328
* Make sure that the landingpad instruction takes a Constant* as the clause's ↵Bill Wendling2011-07-284-7/+8
| | | | | | value. llvm-svn: 136326
* Add a couple of convenience functions:Bill Wendling2011-07-281-0/+17
| | | | | | | * InvokeInst: Get the landingpad instruction associated with this invoke. * LandingPadInst: A method to reserve extra space for clauses. llvm-svn: 136325
* Invert the subvector insertion to be more likely to be taken as a COPYBruno Cardoso Lopes2011-07-281-3/+3
| | | | llvm-svn: 136324
* Add patterns to generate copies for extract_subvector instead ofBruno Cardoso Lopes2011-07-281-0/+12
| | | | | | | using vextractf128. This will reduce the number of issued instruction for several avx codes. llvm-svn: 136323
* movd/movq write zeros in the high 128-bit part of the vector. UseBruno Cardoso Lopes2011-07-281-2/+28
| | | | | | them to match 256-bit scalar_to_vector+zext. llvm-svn: 136322
* Add a few patterns to match allzeros without having to use the fp unit.Bruno Cardoso Lopes2011-07-281-0/+10
| | | | | | | Take advantage that the 128-bit vpxor zeros the higher part and use it. This also fixes PR10491 llvm-svn: 136321
* Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also moveBruno Cardoso Lopes2011-07-282-7/+13
| | | | | | a convert pattern close to the instruction definition. llvm-svn: 136320
* Fix a use after free. An instruction can't be both an intrinsic call and a ↵Benjamin Kramer2011-07-281-1/+1
| | | | | | fence. llvm-svn: 136319
* Initial stab at getting inlining working with the EH rewrite.Bill Wendling2011-07-281-10/+98
| | | | | | | | | This takes the new 'resume' instruction and turns it into a direct jump to the caller's landing pad code. The caller's landingpad instruction is merged with the landingpad instructions of the callee. This is a bit rough and makes some assumptions in how the code works. But it passes a simple test. llvm-svn: 136313
* Add an optional 'bool makeAbsolute' in llvm::sys::fs::unique_file function.Argyrios Kyrtzidis2011-07-282-19/+25
| | | | | | | If true and 'model' parameter is not an absolute path, a temp directory will be prepended. Make it true by default to match current behaviour. llvm-svn: 136310
* Refactor and improve the encodings/decodings for addrmode3 loads, and make ↵Owen Anderson2011-07-273-23/+41
| | | | | | the writeback operand always the first. llvm-svn: 136295
* Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.Evan Cheng2011-07-274-23/+15
| | | | | | | | | This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
* Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates.Kevin Enderby2011-07-273-4/+35
| | | | | | | | | | | | llvm-mc gives an "invalid operand" error for instructions that take an unsigned immediate which have the high bit set such as: pblendw $0xc5, %xmm2, %xmm1 llvm-mc treats all x86 immediates as signed values and range checks them. A small number of x86 instructions use the imm8 field as a set of bits. This change only changes those instructions and where the high bit is not ignored. The others remain unchanged. llvm-svn: 136287
* ARM assembly parsing and encoding support for USAT and USAT16.Jim Grosbach2011-07-271-3/+5
| | | | | | Use range checked immediate operands for instructions. Add tests. llvm-svn: 136285
* Code generation for 'fence' instruction.Eli Friedman2011-07-2714-3/+108
| | | | llvm-svn: 136283
* Use BlockFrequency instead of uint32_t in BlockFrequencyInfo.Jakub Staszak2011-07-272-2/+2
| | | | llvm-svn: 136278
* ARM assembly parsing and encoding for UMULL.Jim Grosbach2011-07-271-1/+1
| | | | | | Fix parsing of the 's' suffix for the mnemonic. Add tests. llvm-svn: 136277
* Remove outdated FIXME comment.Devang Patel2011-07-271-1/+0
| | | | llvm-svn: 136275
* ARM assembly parsing and encoding for UMLAL.Jim Grosbach2011-07-271-1/+2
| | | | | | Fix parsing of the 's' suffix for the mnemonic. Add tests. llvm-svn: 136274
* Refuse to inline two functions which use different personality functions.Bill Wendling2011-07-271-0/+34
| | | | llvm-svn: 136269
* ARM parsing and encoding of SBFX and UBFX.Jim Grosbach2011-07-278-23/+19
| | | | | | | | | Encode the width operand as it encodes in the instruction, which simplifies the disassembler and the encoder, by using the imm1_32 operand def. Add a diagnostic for the context-sensitive constraint that the width must be in the range [1,32-lsb]. llvm-svn: 136264
* Refactor the STRT and STRBT instructions to distinguish between the ↵Owen Anderson2011-07-271-2/+30
| | | | | | register-addend and immediate-addend versions. Temporarily XFAIL the asm parsing tests for these instructions. llvm-svn: 136255
* Merge the contents from exception-handling-rewrite to the mainline.Bill Wendling2011-07-2719-24/+382
| | | | | | This adds the new instructions 'landingpad' and 'resume'. llvm-svn: 136253
* ARM assembly parsing and encoding for extend instructions.Jim Grosbach2011-07-272-0/+83
| | | | | | | Assembly parser handling for extend instruction rotate operands. Add tests for the sign extend instructions. llvm-svn: 136252
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