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* Remove unused header. NFC.Juergen Ributzka2014-12-221-1/+0
* [C API] Expose LLVMGetGlobalValueAddress and LLVMGetFunctionAddress.Peter Zotov2014-12-221-0/+8
* [CodeGenPrepare] Handle properly the promotion of operands when this does notQuentin Colombet2014-12-221-3/+7
* AVX-512: Added all forms of BLENDM instructions,Elena Demikhovsky2014-12-223-55/+120
* Lower multiply-negate operation to mneg on AArch64Karthik Bhat2014-12-221-0/+4
* The leak detector is dead, long live asan and valgrind.Rafael Espindola2014-12-2210-146/+0
* CodeGen: minor style tweaks to SSPSaleem Abdulrasool2014-12-211-13/+15
* [X86] Add hasSideEffects = 0 to CALLpcrel16. This matches what is inferred fr...Craig Topper2014-12-211-4/+5
* Enable (sext x) == C --> x == (trunc C) combineMatt Arsenault2014-12-212-30/+28
* [X86] Swap operand order in Intel syntax on a bunch of aliases.Craig Topper2014-12-201-18/+18
* [X86] Swap operand order of imul aliases in Intel syntax. Also disable printi...Craig Topper2014-12-201-6/+6
* [X86] Remove '*' from asm strings in far call/jump aliases for Intel syntax.Craig Topper2014-12-201-11/+11
* [X86] Don't swap the order of segment and offset in immediate form of far cal...Craig Topper2014-12-201-4/+4
* CodeGen: constify and use range loop for SSPSaleem Abdulrasool2014-12-201-8/+4
* ARM: further improve deprecated diagnosis (LDM)Saleem Abdulrasool2014-12-202-1/+33
* [X86] Immediate forms of far call/jump are not valid in x86-64.Craig Topper2014-12-201-16/+20
* InstCombine: Squash an icmp+select into bitwise arithmeticDavid Majnemer2014-12-201-6/+24
* InstSimplify: Don't bother if getScalarSizeInBits returns zeroDavid Majnemer2014-12-201-4/+5
* Simplify the codeDavid Majnemer2014-12-201-41/+25
* InstSimplify: Optimize away pointless comparisonsDavid Majnemer2014-12-201-2/+38
* [SROA] Run clang-format over the entire SROA pass as I wrote it beforeChandler Carruth2014-12-201-157/+138
* LiveIntervalAnalysis: No kill flags for partially undefined uses.Matthias Braun2014-12-201-24/+68
* LiveIntervalAnalysis: cleanup addKills(), NFCMatthias Braun2014-12-201-19/+18
* Remove unused variable and initialization.Eric Christopher2014-12-201-4/+1
* Remove unused variable, initializer, and accessor.Eric Christopher2014-12-192-10/+4
* R600: Remove outdated commentMatt Arsenault2014-12-191-4/+0
* Masked load and store codegen - fixed 128-bit vectorsElena Demikhovsky2014-12-193-20/+71
* R600/SI: Only form min/max with 1 use.Matt Arsenault2014-12-191-1/+1
* EH: Sink computation of local PadMap variable into function that uses itReid Kleckner2014-12-192-17/+15
* Add printing the LC_ROUTINES load commands with llvm-objdump’s -private-hea...Kevin Enderby2014-12-191-0/+10
* Add the ExceptionHandling::MSVC enumerationReid Kleckner2014-12-195-13/+15
* Model sqrtss as a binary operation with one source operand tied to the destin...Sanjay Patel2014-12-191-58/+12
* R600/SI: isLegalOperand() shouldn't check constant bus for SALU instructionsTom Stellard2014-12-191-1/+1
* R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operandTom Stellard2014-12-194-17/+25
* Remove isSubroutineType test for isCompositeType, getTag() is enough.Yaron Keren2014-12-191-1/+1
* Add printing the LC_SUB_CLIENT load command with llvm-objdump’s -private-he...Kevin Enderby2014-12-191-0/+5
* [Hexagon] Removing old variants of instructions and updating references.Colin LeMahieu2014-12-196-161/+13
* merge consecutive stores of extracted vector elementsSanjay Patel2014-12-191-4/+75
* [Hexagon] Adding bit extraction and table indexing instructions.Colin LeMahieu2014-12-191-0/+101
* [Hexagon] Adding bit insertion instructions.Colin LeMahieu2014-12-191-0/+65
* [Hexagon] Adding more xtype shift instructions.Colin LeMahieu2014-12-191-0/+107
* Add printing the LC_SUB_LIBRARY load command with llvm-objdump’s -private-h...Kevin Enderby2014-12-191-0/+5
* [Hexagon] Adding xtype shift instructions.Colin LeMahieu2014-12-191-0/+198
* [Hexagon] Adding transfers to and from control registers.Colin LeMahieu2014-12-192-0/+65
* [Hexagon] Adding doubleregs for control registers. Renaming control register...Colin LeMahieu2014-12-194-22/+66
* [DebugInfo] Move all DWARF headers to the public include directory.Frederic Riss2014-12-1932-1608/+26
* [BBVectorize] Remove two more redundant assignments.Tilmann Scheller2014-12-191-2/+0
* [BBVectorize] Remove redundant assignment.Tilmann Scheller2014-12-191-1/+0
* Reapply: [InstCombine] Fix visitSwitchInst to use right operand types for sub...Bruno Cardoso Lopes2014-12-191-3/+10
* [LoopVectorize] Remove redundant assignment.Tilmann Scheller2014-12-191-1/+0
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