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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-12-19 23:15:30 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-12-19 23:15:30 +0000 |
| commit | dc103075249aeb0f1d187f8eedfe561634062c43 (patch) | |
| tree | d62f026f17ad6e393e5a792ee222d5ef168268e9 /llvm/lib | |
| parent | f053fc9b5c70d22a0a2ae665170e30d8b8a26cc3 (diff) | |
| download | bcm5719-llvm-dc103075249aeb0f1d187f8eedfe561634062c43.tar.gz bcm5719-llvm-dc103075249aeb0f1d187f8eedfe561634062c43.zip | |
R600/SI: Only form min/max with 1 use.
If the condition is used for something else, this increases
the number of instructions.
llvm-svn: 224646
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index 5783d4398ed..d0bbb50464c 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -2300,7 +2300,7 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N, } case ISD::SELECT: { SDValue Cond = N->getOperand(0); - if (Cond.getOpcode() == ISD::SETCC) { + if (Cond.getOpcode() == ISD::SETCC && Cond.hasOneUse()) { SDLoc DL(N); EVT VT = N->getValueType(0); SDValue LHS = Cond.getOperand(0); |
