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* MIR Parser: Simplify the handling of quoted tokens. NFC.Alex Lorenz2015-08-053-77/+42
* [AArch64] Register AArch64DeadRegisterDefinition pass with LLVM pass manager.Chad Rosier2015-08-051-2/+14
* [Sparc] Fix disassembly of popc instruction.James Y Knight2015-08-051-2/+2
* AMDGPU/SI: Remove EXECRegMatt Arsenault2015-08-055-21/+9
* AMDGPU: Remove SCCReg.Matt Arsenault2015-08-055-36/+22
* [AArch64] Register (existing) AArch64BranchRelaxation pass with LLVM pass man...Chad Rosier2015-08-051-2/+13
* Force the MachO generated for Darwin to have VERSION_MIN load commandSteven Wu2015-08-051-0/+10
* [AArch64] Make the naming of the Address Type Promotion pass consistent.Chad Rosier2015-08-051-3/+5
* [AArch64] Register (existing) AArch64AdvSIMDScalar pass with LLVM pass manager.Chad Rosier2015-08-051-2/+13
* revert r243687: enable fast-math-flag propagation to DAG nodes Sanjay Patel2015-08-051-1/+1
* Make this less error prone by using a #define. NFC.Chad Rosier2015-08-051-5/+5
* [AArch64] Register (existing) AArch64ExpandPseudo pass with LLVM pass manager.Chad Rosier2015-08-051-2/+13
* [AA] Use CallSite cast idiom. No functionality change.Benjamin Kramer2015-08-051-3/+2
* [YAMLTraits] Use StringRef::copy. No functionality change.Benjamin Kramer2015-08-051-12/+4
* [IR] Simplify code with ArrayRef::copy. No functionality change.Benjamin Kramer2015-08-051-7/+3
* [AArch64] Register (existing) AArch64LoadStoreOpt pass with LLVM pass manager.Chad Rosier2015-08-051-2/+13
* Update comment. NFC.Chad Rosier2015-08-051-2/+2
* ARMISelDAGToDAG.cpp had this self-contradictory code:Artyom Skrobov2015-08-051-5/+5
* Fixed line endings.Simon Pilgrim2015-08-051-72/+72
* [MachineCombiner] Don't use the opcode-only form of computeInstrLatencyHal Finkel2015-08-051-1/+1
* Windows/COM.inc: Fix emacs mode in the first line.NAKAMURA Takumi2015-08-051-1/+1
* Rename all references to old mailing lists to new lists.llvm.org address.Tanya Lattner2015-08-055-5/+5
* Avoid passing nullptr to std::equal. Yaron Keren2015-08-041-1/+2
* wrap OptSize and MinSize attributes for easier and consistent access (NFCI)Sanjay Patel2015-08-0426-50/+43
* [RuntimeDyld] Adapt PPC64 relocations to PPC32Hal Finkel2015-08-042-0/+26
* [x86] machine combiner reassociation: mark EFLAGS operand as 'dead'Sanjay Patel2015-08-041-4/+43
* [mips][FastISel] Disable code generation for unsupported targets through Fast...Vasileios Kalintiris2015-08-041-0/+12
* Revert r229675 - [mips] Avoid redundant sign extension of the result of binar...Vasileios Kalintiris2015-08-041-8/+0
* Fix 80-columnDuncan P. N. Exon Smith2015-08-041-1/+2
* Linker: Fix ASan failure from r243961Duncan P. N. Exon Smith2015-08-041-9/+11
* Drive-by fixes for LandingPad -> EHPadDavid Majnemer2015-08-049-22/+27
* [InstCombine] Moved SSE vector shift constant folding into its own helper fun...Simon Pilgrim2015-08-041-80/+72
* Linker: Fix references to uniqued nodes after r243883Duncan P. N. Exon Smith2015-08-041-1/+3
* Remove the configure and cmake checks for sys/wait.hJustin Bogner2015-08-042-19/+1
* [SDAG] Fix a result chain in ExpandUnalignedLoadHal Finkel2015-08-041-1/+1
* [LAA] Remove unused pointer partition argument from addRuntimeCheck, NFCAdam Nemet2015-08-041-2/+2
* Introduce enum value for previously defined metadata -- make.implicit Chen Li2015-08-042-1/+8
* ARM: support windows division routinesSaleem Abdulrasool2015-08-041-0/+5
* ARM: make Darwin libcall registration table driven (NFC)Saleem Abdulrasool2015-08-041-71/+65
* [UB] Don't allocate space for contained types and then try to copy theChandler Carruth2015-08-041-0/+6
* Revert "[LSR] Generate and use zero extends"Sanjoy Das2015-08-041-139/+21
* [AArch64] Rename FP formats to be more consistent. NFC.Ahmed Bougacha2015-08-042-40/+40
* [AArch64] Add isel support for f16 indexed LD/ST.Ahmed Bougacha2015-08-042-0/+4
* [UB] Fix yet another use of memcpy with a null pointer argument. I thinkChandler Carruth2015-08-041-1/+2
* [AArch64][v8.1a] The "pan" sysreg isn't MSR-specific. NFCI.Ahmed Bougacha2015-08-041-3/+0
* [AArch64] Remove unnecessary "break". NFC.Ahmed Bougacha2015-08-041-1/+0
* [AArch64] Use SDValue bool operator. NFC.Ahmed Bougacha2015-08-041-6/+3
* [AArch64] Vector FCOPYSIGN supports Custom-lowering: mark it as such.Ahmed Bougacha2015-08-041-1/+4
* [CodeGen] Fix FCOPYSIGN legalization to account for mismatched types.Ahmed Bougacha2015-08-042-2/+53
* MIR Serialization: Serialize the 'volatile' machine memory operand flag.Alex Lorenz2015-08-044-2/+26
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