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* LSR debug fix.Evgeny Stupachenko2016-11-211-1/+1
| | | | | | | | | | | Summary: Dump instruction instead of address. Reviewers: hfinkel Differential Revision: http://reviews.llvm.org/D26877 From: Evgeny Stupachenko <evstupac@gmail.com> llvm-svn: 287584
* fix formatting; NFCSanjay Patel2016-11-211-1/+0
| | | | llvm-svn: 287582
* [asan] Make ASan compatible with linker dead stripping on WindowsReid Kleckner2016-11-211-47/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is similar to what was done for Darwin in rL264645 / http://reviews.llvm.org/D16737, but it uses COFF COMDATs to achive the same result instead of relying on new custom linker features. As on MachO, this creates one metadata global per instrumented global. The metadata global is placed in the custom .ASAN$GL section, which the ASan runtime will iterate over during initialization. There are no other references to the metadata, so normal linker dead stripping would discard it. However, the metadata is put in a COMDAT group with the instrumented global, so that it will be discarded if and only if the instrumented global is discarded. I didn't update the ASan ABI version check since this doesn't affect non-Windows platforms, and the WinASan ABI isn't really stable yet. Implementing this for ELF will require extending LLVM IR and MC a bit so that we can use non-COMDAT section groups. Reviewers: pcc, kcc, mehdi_amini, kubabrecka Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26770 llvm-svn: 287576
* [mips] seq macro supportSimon Dardis2016-11-212-0/+110
| | | | | | | | | | | | | | This patch adds the seq macro. This partially resolves PR/30381. Thanks to Sean Bruno for reporting the issue! Reviewers: zoran.jovanovic, vkalintiris, seanbruno Differential Revision: https://reviews.llvm.org/D24607 llvm-svn: 287573
* Check proper live range in extendPHIRangesKrzysztof Parzyszek2016-11-212-7/+17
| | | | | | | | | | | | | The function extendPHIRanges checks the main range of the original live interval, even when dealing with a subrange. This could also lead to an assert when the subrange is not live at the extension point, but the main range is. To avoid this, check the corresponding subrange of the original live range, instead of always checking the main range. Review (as a part of a bigger set of changes): https://reviews.llvm.org/D26359 llvm-svn: 287571
* [TLI] Fix breakage introduced by D21739.Marcin Koscielnicki2016-11-211-19/+19
| | | | | | | | | The initialize function has an early return for AMDGPU targets. If taken, the ShouldExtI32* initialization code will not be executed, resulting in invalid values in the corresponding fields. Fix this by moving the code to the top of the function. llvm-svn: 287570
* [AsmPrinter] Enable codeview for windows-itaniumShoaib Meenai2016-11-211-1/+2
| | | | | | | | | | Enable codeview emission for windows-itanium targets. Co-opt an existing test (which is derived from a C source file and should therefore be identical across the Itanium and MS ABIs). Differential Revision: https://reviews.llvm.org/D26693 llvm-svn: 287567
* [MemorySSA] Fix for non-determinism in codegenMandeep Singh Grang2016-11-211-2/+11
| | | | | | | | | | | | | | | | | | | | This patch fixes the non-determinism caused due to iterating SmallPtrSet's which was uncovered due to the experimental "reverse iteration order " patch: https://reviews.llvm.org/D26718 The following unit tests failed because of the undefined order of iteration. LLVM :: Transforms/Util/MemorySSA/cyclicphi.ll LLVM :: Transforms/Util/MemorySSA/many-dom-backedge.ll LLVM :: Transforms/Util/MemorySSA/many-doms.ll LLVM :: Transforms/Util/MemorySSA/phi-translation.ll Reviewers: dberlin, mgrang Subscribers: dberlin, llvm-commits, david2050 Differential Revision: https://reviews.llvm.org/D26704 llvm-svn: 287563
* [VectorLegalizer] Remove EVT::getSizeInBits code duplications. NFCI.Simon Pilgrim2016-11-211-8/+6
| | | | | | We were calling SVT.getSizeInBits() several times in a row - just call it once and reuse the result. llvm-svn: 287556
* [CodeGenPrep] Skip merging empty case blocksJun Bum Lim2016-11-211-32/+135
| | | | | | | | | | | | | | | | Summary: Merging an empty case block into the header block of switch could cause ISel to add COPY instructions in the header of switch, instead of the case block, if the case block is used as an incoming block of a PHI. This could potentially increase dynamic instructions, especially when the switch is in a loop. I added a test case which was reduced from the benchmark I was targetting. Reviewers: t.p.northover, mcrosier, manmanren, wmi, davidxl Subscribers: qcolombet, danielcdh, hfinkel, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D22696 llvm-svn: 287553
* small fixup which enables the issuing of the aforementioned instruction (w/o ↵Coby Tayree2016-11-211-1/+1
| | | | | | | | operands), on MS/Intel syntax. Differential Revision: https://reviews.llvm.org/D26913 llvm-svn: 287548
* Fix known zero bits for addrspacecast.Yaxun Liu2016-11-211-1/+0
| | | | | | | | | | Currently LLVM assumes that a pointer addrspacecasted to a different addr space is equivalent to trunc or zext bitwise, which is not true. For example, in amdgcn target, when a null pointer is addrspacecasted from addr space 4 to 0, its value is changed from i64 0 to i32 -1. This patch teaches LLVM not to assume known bits of addrspacecast instruction to its operand. Differential Revision: https://reviews.llvm.org/D26803 llvm-svn: 287545
* [SelectionDAG] Add ComputeNumSignBits support for CONCAT_VECTORS opcodeSimon Pilgrim2016-11-211-0/+7
| | | | llvm-svn: 287541
* [X86][SSE] Allow PACKSS to be used to truncate any type of all/none sign ↵Simon Pilgrim2016-11-211-16/+16
| | | | | | | | | | bits input At the moment we only use truncateVectorCompareWithPACKSS with direct vector comparison results (just one example of a known all/none signbits input). This change relaxes the direct matching of a SETCC opcode by moving the logic up into SelectionDAG::ComputeNumSignBits and accepting any input with a known splatted signbit. llvm-svn: 287535
* [InstrProfiling] Mark __llvm_profile_instrument_target last parameter as i32 ↵Marcin Koscielnicki2016-11-211-11/+30
| | | | | | | | | | | | | | | | | zeroext if appropriate. On some architectures (s390x, ppc64, sparc64, mips), C-level int is passed as i32 signext instead of plain i32. Likewise, unsigned int may be passed as i32, i32 signext, or i32 zeroext depending on the platform. Mark __llvm_profile_instrument_target properly (its last parameter is unsigned int). This (together with the clang change) makes compiler-rt profile testsuite pass on s390x. Differential Revision: http://reviews.llvm.org/D21736 llvm-svn: 287534
* [TLI] Add functions determining if int parameters/returns should be ↵Marcin Koscielnicki2016-11-211-2/+32
| | | | | | | | | | | | | | | zeroext/signext. On some architectures (s390x, ppc64, sparc64, mips), C-level int is passed as i32 signext instead of plain i32. Likewise, unsigned int may be passed as i32, i32 signext, or i32 zeroext depending on the platform. Add this information to TargetLibraryInfo, to be used whenever some LLVM pass inserts a compiler-rt call to a function involving int parameters or returns. Differential Revision: http://reviews.llvm.org/D21739 llvm-svn: 287533
* Fixing a small typo (A->U). Michael Zuckerman2016-11-211-1/+1
| | | | | | | | | This seem to fixes PR30992. - HasAVX512 ? X86::VMOVAPSZ128rm_NOVLX + HasAVX512 ? X86::VMOVUPSZ128rm_NOVLX llvm-svn: 287532
* [AVX-512] Add EVEX form of VMOVZPQILo2PQIZrm to load folding tables to match ↵Craig Topper2016-11-211-0/+1
| | | | | | SSE and AVX. llvm-svn: 287523
* [bpf] fix dwarf elf relocs and line numbersAlexei Starovoitov2016-11-212-4/+13
| | | | | | | | | - teach RelocVisitor to recognize bpf relocations - fix AsmInfo->PointerSize to make sure dwarf is emitted correctly - add a test for the above Signed-off-by: Alexei Starovoitov <ast@kernel.org> llvm-svn: 287521
* [X86] Remove duplicate instructions for (v)movq and replace with patterns on ↵Craig Topper2016-11-212-29/+10
| | | | | | other instructions. NFC llvm-svn: 287519
* [XRay][AArch64] Implemented a test for the compile-time sleds emitted, and ↵Dean Michael Berris2016-11-211-1/+3
| | | | | | | | | | | | | | | | | fixed a bug in the jump instruction This patch adds a test for the assembly code emitted with XRay instrumentation. It also fixes a bug where the operand of a jump instruction must be not the number of bytes to jump over, but rather the number of 4-byte instructions. Author: rSerge Reviewers: dberris, rengolin Differential Revision: https://reviews.llvm.org/D26805 llvm-svn: 287516
* [GlobalSplit] Port to the new pass manager.Davide Italiano2016-11-213-0/+9
| | | | llvm-svn: 287511
* [mips] Restrict tail call optimizationSimon Dardis2016-11-201-4/+13
| | | | | | | | | | | | The tail call optimization was being used without proper consideration of ABI requirements for saving and restoring the GP. This patch restricts tail call optimization to functions within the same translation unit. Reviewers: vkalintiris Differential Revision: https://reviews.llvm.org/D24763 llvm-svn: 287505
* The 'vpmultishiftqb' instruction was implemented falsely, this patch amend it.Coby Tayree2016-11-201-2/+2
| | | | | | | | More specifically - (MS dialect) broadcasting variants were implemented falsely. Differential Revision: https://reviews.llvm.org/D26257 llvm-svn: 287501
* Some instructions were missing, other implemented falsely. this patch aims ↵Coby Tayree2016-11-201-8/+8
| | | | | | | | | | | | | | | | | | | | at amending those issues. full list: vcvtps2pd vcvtudq2pd vcvtps2qq vcvttps2qq vcvtps2uqq vcvttps2uqq variants are: [Dst]XMM(zero-masked/merge-masked/unmasked) [Src]Mem64 Differential Revision: https://reviews.llvm.org/D26799 llvm-svn: 287500
* [X86][AVX512] Combine unary + zero target shuffles to VPERMV3 with a zero ↵Simon Pilgrim2016-11-201-0/+33
| | | | | | vector where possible llvm-svn: 287497
* [X86][AVX512] Add support for VBMI VPERMV3 target shuffle combinesSimon Pilgrim2016-11-201-1/+3
| | | | llvm-svn: 287496
* [X86][AVX512] Add support for VBMI VPERMV target shuffle combinesSimon Pilgrim2016-11-201-1/+3
| | | | llvm-svn: 287495
* [X86][AVX512VL] Removed duplicate operation actionSimon Pilgrim2016-11-201-2/+1
| | | | | | Basic AVX512F already declared uint_to_fp v4i32 as legal llvm-svn: 287493
* Strip trailing whitespaceSimon Pilgrim2016-11-201-9/+9
| | | | llvm-svn: 287492
* [X86][AVX512F] Add support for uint_to_fp v2i32 to v2f64 on AVX512F-only targetsSimon Pilgrim2016-11-202-1/+6
| | | | | | Use 512-bit instructions (we already do something similar for uint_to_fp v4i32 to v4f64) llvm-svn: 287491
* Fix comment typos. NFC.Simon Pilgrim2016-11-209-12/+12
| | | | | | Identified by Pedro Giffuni in PR27636. llvm-svn: 287490
* Fix spelling mistakes in Transforms comments. NFC.Simon Pilgrim2016-11-208-9/+9
| | | | | | Identified by Pedro Giffuni in PR27636. llvm-svn: 287488
* Fix spelling mistakes in SelectionDAG comments. NFC.Simon Pilgrim2016-11-204-5/+5
| | | | | | Identified by Pedro Giffuni in PR27636. llvm-svn: 287487
* Fix comment typos. NFC.Simon Pilgrim2016-11-201-2/+2
| | | | | | Identified by Pedro Giffuni in PR27636. llvm-svn: 287486
* [X86] RegCall - Handling long double argumentsOren Ben Simhon2016-11-203-10/+49
| | | | | | | | | | The change is part of RegCall calling convention support for LLVM. Long double (f80) requires special treatment as the first f80 parameter is saved in FP0 (floating point stack). This review present the change and the corresponding tests. Differential Revision: https://reviews.llvm.org/D26151 llvm-svn: 287485
* [X86][InlineAsm]Test commit.Coby Tayree2016-11-201-1/+1
| | | | | | | | Fixing a wrong comment on X86AsmParser.cpp::ParseZ: "true" --> "false" Differential Revision: https://reviews.llvm.org/D26797 llvm-svn: 287484
* Fix file name resolution in nested response filesSerge Pavlov2016-11-201-0/+6
| | | | | | | | | | If a response file in construct `@file` was specified by relative name, constructs `@file` nested within it were resolved incorrectly if the flag RelativeNames in call to ExpandResponseFile was set to true. This feature is used in configuration files, tests for it are in respective change (see D24933). llvm-svn: 287482
* [bpf] add BPF disassemblerAlexei Starovoitov2016-11-206-3/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | add BPF disassembler, so tools like llvm-objdump can be used: $ llvm-objdump -d -no-show-raw-insn ./sockex1_kern.o ./sockex1_kern.o: file format ELF64-BPF Disassembly of section socket1: bpf_prog1: 0: r6 = r1 8: r0 = *(u8 *)skb[23] 10: *(u32 *)(r10 - 4) = r0 18: r1 = *(u32 *)(r6 + 4) 20: if r1 != 4 goto 8 28: r2 = r10 30: r2 += -4 ld_imm64 (the only 16-byte insn) and special ld_abs/ld_ind instructions had to be treated in a special way. The decoders for the rest of the insns are automatically generated. Add tests to cover new functionality. Signed-off-by: Alexei Starovoitov <ast@kernel.org> llvm-svn: 287477
* Attempt to fix big-endian buildbots.Rui Ueyama2016-11-201-7/+0
| | | | llvm-svn: 287476
* Style fix. NFC.Rui Ueyama2016-11-201-7/+7
| | | | llvm-svn: 287475
* Fix buildbot.Rui Ueyama2016-11-201-2/+2
| | | | llvm-svn: 287474
* SHA1: unroll loop in hashBlock.Rui Ueyama2016-11-201-44/+152
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code is taken from public domain. https://github.com/jsonn/src/blob/trunk/common/lib/libc/hash/sha1/sha1.c I wrote a sha1 command and ran it on my Xeon E5-2680 v2 2.80GHz machine. Here is a result. The new hash function is 37% faster than before. Performance counter stats for './llvm-sha1-old /ssd/build/bin/lld' (10 runs): 6640.503687 task-clock (msec) # 1.001 CPUs utilized ( +- 0.03% ) 54 context-switches # 0.008 K/sec ( +- 5.03% ) 5 cpu-migrations # 0.001 K/sec ( +- 31.73% ) 183,803 page-faults # 0.028 M/sec ( +- 0.00% ) 18,527,954,113 cycles # 2.790 GHz ( +- 0.03% ) 4,993,237,485 stalled-cycles-frontend # 26.95% frontend cycles idle ( +- 0.11% ) <not supported> stalled-cycles-backend 50,217,149,423 instructions # 2.71 insns per cycle # 0.10 stalled cycles per insn ( +- 0.00% ) 6,094,322,337 branches # 917.750 M/sec ( +- 0.00% ) 11,778,239 branch-misses # 0.19% of all branches ( +- 0.01% ) 6.634017401 seconds time elapsed ( +- 0.03% ) Performance counter stats for './llvm-sha1-new /ssd/build/bin/lld' (10 runs): 4167.062720 task-clock (msec) # 1.001 CPUs utilized ( +- 0.02% ) 52 context-switches # 0.012 K/sec ( +- 16.45% ) 7 cpu-migrations # 0.002 K/sec ( +- 32.20% ) 183,804 page-faults # 0.044 M/sec ( +- 0.00% ) 11,626,611,958 cycles # 2.790 GHz ( +- 0.02% ) 4,491,897,976 stalled-cycles-frontend # 38.63% frontend cycles idle ( +- 0.05% ) <not supported> stalled-cycles-backend 24,320,180,617 instructions # 2.09 insns per cycle # 0.18 stalled cycles per insn ( +- 0.00% ) 1,574,674,576 branches # 377.886 M/sec ( +- 0.00% ) 11,769,693 branch-misses # 0.75% of all branches ( +- 0.00% ) 4.163251552 seconds time elapsed ( +- 0.02% ) Differential Revision: https://reviews.llvm.org/D26890 llvm-svn: 287473
* Demangle: remove references to allocator for default allocatorSaleem Abdulrasool2016-11-201-50/+29
| | | | | | | | | The demangler had stopped using a custom allocator but had not been updated to remove the use of the explicit allocator passing. This removes that as we do not need to do anything special here anymore. This just makes the code more compact. NFC. llvm-svn: 287472
* Demangle: remove unnecessary typedef for std::vectorSaleem Abdulrasool2016-11-201-5/+3
| | | | | | | We could create a local typedef for std::vector called Vector. Inline the use of std::vector rather than use the typedef. NFC. llvm-svn: 287471
* Demangle: replace custom typedef for std::string with std::stringSaleem Abdulrasool2016-11-201-41/+37
| | | | | | | | We created a local typedef for `std::basic_string<char, std::char_traits<char>>` which is just `std::string`. Remove the local typedef and propagate the type information through the rest of the demangler. NFC. llvm-svn: 287470
* Demangle: use direct member initialization (NFC)Saleem Abdulrasool2016-11-201-14/+7
| | | | | | | Prefer direct member initialization over the explicit out-of-line initialization for the construction of the local type. NFC. llvm-svn: 287469
* Give some helper classes/functions internal linkage. NFC.Benjamin Kramer2016-11-194-8/+14
| | | | llvm-svn: 287462
* [X86][SSE] Improve PSHUFB lowering from either inputSimon Pilgrim2016-11-191-5/+10
| | | | | | Canonicalization may leave the zeroable vector in the first input. llvm-svn: 287461
* [X86][AVX512] Add VPERMV/VPERMV3 v64i8 byte shuffles on avx512vbmi targetsSimon Pilgrim2016-11-191-3/+4
| | | | llvm-svn: 287459
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