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* ARM parsing and encoding for ADR.Jim Grosbach2011-07-281-1/+1
| | | | | | The label does not have a '#' prefix. Add parsing and encoding tests. llvm-svn: 136360
* CR fix: The ANY_EXTEND can be removed because the input and putput type must beNadav Rotem2011-07-281-2/+1
| | | | | | identical. llvm-svn: 136355
* Some minor cleanups. No functionalitical change.Bill Wendling2011-07-281-17/+10
| | | | llvm-svn: 136341
* Leverage some of the code that John wrote to manage the landing pads.Bill Wendling2011-07-281-32/+56
| | | | | | | The new EH is more simple in many respects. Mainly, we don't have to worry about the "llvm.eh.exception" and "llvm.eh.selector" calls being in weird places. llvm-svn: 136339
* Don't add in the asked for size so that we don't copy too much from the old ↵Bill Wendling2011-07-281-3/+3
| | | | | | to new vectors. llvm-svn: 136338
* Automatically merge the landingpad clauses when we come across a callee'sBill Wendling2011-07-281-28/+12
| | | | | | landingpad. llvm-svn: 136329
* Explicitly declare a library dependency of LLVM*Desc toOscar Fuentes2011-07-286-0/+12
| | | | | | | | | | | | | | | | | | | LLVM*AsmPrinter. GenLibDeps.pl fails to detect vtable references. As this is the only referenced symbol from LLVM*Desc to LLVM*AsmPrinter on optimized builds, the algorithm that creates the list of libraries to be linked into tools doesn't know about the dependency and sometimes places the libraries on the wrong order, yielding error messages like this: ../../lib/libLLVMARMDesc.a(ARMMCTargetDesc.cpp.o): In function `llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)': ARMMCTargetDesc.cpp:(.text._ZN4llvm14ARMInstPrinterC1ERKNS_9MCAsmInfoE [llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)]+0x2a): undefined reference to `vtable for llvm::ARMInstPrinter' llvm-svn: 136328
* Make sure that the landingpad instruction takes a Constant* as the clause's ↵Bill Wendling2011-07-284-7/+8
| | | | | | value. llvm-svn: 136326
* Add a couple of convenience functions:Bill Wendling2011-07-281-0/+17
| | | | | | | * InvokeInst: Get the landingpad instruction associated with this invoke. * LandingPadInst: A method to reserve extra space for clauses. llvm-svn: 136325
* Invert the subvector insertion to be more likely to be taken as a COPYBruno Cardoso Lopes2011-07-281-3/+3
| | | | llvm-svn: 136324
* Add patterns to generate copies for extract_subvector instead ofBruno Cardoso Lopes2011-07-281-0/+12
| | | | | | | using vextractf128. This will reduce the number of issued instruction for several avx codes. llvm-svn: 136323
* movd/movq write zeros in the high 128-bit part of the vector. UseBruno Cardoso Lopes2011-07-281-2/+28
| | | | | | them to match 256-bit scalar_to_vector+zext. llvm-svn: 136322
* Add a few patterns to match allzeros without having to use the fp unit.Bruno Cardoso Lopes2011-07-281-0/+10
| | | | | | | Take advantage that the 128-bit vpxor zeros the higher part and use it. This also fixes PR10491 llvm-svn: 136321
* Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also moveBruno Cardoso Lopes2011-07-282-7/+13
| | | | | | a convert pattern close to the instruction definition. llvm-svn: 136320
* Fix a use after free. An instruction can't be both an intrinsic call and a ↵Benjamin Kramer2011-07-281-1/+1
| | | | | | fence. llvm-svn: 136319
* Initial stab at getting inlining working with the EH rewrite.Bill Wendling2011-07-281-10/+98
| | | | | | | | | This takes the new 'resume' instruction and turns it into a direct jump to the caller's landing pad code. The caller's landingpad instruction is merged with the landingpad instructions of the callee. This is a bit rough and makes some assumptions in how the code works. But it passes a simple test. llvm-svn: 136313
* Add an optional 'bool makeAbsolute' in llvm::sys::fs::unique_file function.Argyrios Kyrtzidis2011-07-282-19/+25
| | | | | | | If true and 'model' parameter is not an absolute path, a temp directory will be prepended. Make it true by default to match current behaviour. llvm-svn: 136310
* Refactor and improve the encodings/decodings for addrmode3 loads, and make ↵Owen Anderson2011-07-273-23/+41
| | | | | | the writeback operand always the first. llvm-svn: 136295
* Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.Evan Cheng2011-07-274-23/+15
| | | | | | | | | This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
* Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates.Kevin Enderby2011-07-273-4/+35
| | | | | | | | | | | | llvm-mc gives an "invalid operand" error for instructions that take an unsigned immediate which have the high bit set such as: pblendw $0xc5, %xmm2, %xmm1 llvm-mc treats all x86 immediates as signed values and range checks them. A small number of x86 instructions use the imm8 field as a set of bits. This change only changes those instructions and where the high bit is not ignored. The others remain unchanged. llvm-svn: 136287
* ARM assembly parsing and encoding support for USAT and USAT16.Jim Grosbach2011-07-271-3/+5
| | | | | | Use range checked immediate operands for instructions. Add tests. llvm-svn: 136285
* Code generation for 'fence' instruction.Eli Friedman2011-07-2714-3/+108
| | | | llvm-svn: 136283
* Use BlockFrequency instead of uint32_t in BlockFrequencyInfo.Jakub Staszak2011-07-272-2/+2
| | | | llvm-svn: 136278
* ARM assembly parsing and encoding for UMULL.Jim Grosbach2011-07-271-1/+1
| | | | | | Fix parsing of the 's' suffix for the mnemonic. Add tests. llvm-svn: 136277
* Remove outdated FIXME comment.Devang Patel2011-07-271-1/+0
| | | | llvm-svn: 136275
* ARM assembly parsing and encoding for UMLAL.Jim Grosbach2011-07-271-1/+2
| | | | | | Fix parsing of the 's' suffix for the mnemonic. Add tests. llvm-svn: 136274
* Refuse to inline two functions which use different personality functions.Bill Wendling2011-07-271-0/+34
| | | | llvm-svn: 136269
* ARM parsing and encoding of SBFX and UBFX.Jim Grosbach2011-07-278-23/+19
| | | | | | | | | Encode the width operand as it encodes in the instruction, which simplifies the disassembler and the encoder, by using the imm1_32 operand def. Add a diagnostic for the context-sensitive constraint that the width must be in the range [1,32-lsb]. llvm-svn: 136264
* Refactor the STRT and STRBT instructions to distinguish between the ↵Owen Anderson2011-07-271-2/+30
| | | | | | register-addend and immediate-addend versions. Temporarily XFAIL the asm parsing tests for these instructions. llvm-svn: 136255
* Merge the contents from exception-handling-rewrite to the mainline.Bill Wendling2011-07-2719-24/+382
| | | | | | This adds the new instructions 'landingpad' and 'resume'. llvm-svn: 136253
* ARM assembly parsing and encoding for extend instructions.Jim Grosbach2011-07-272-0/+83
| | | | | | | Assembly parser handling for extend instruction rotate operands. Add tests for the sign extend instructions. llvm-svn: 136252
* Teach the ConstantMerge pass about alignment. Fixes PR10514!Nick Lewycky2011-07-271-8/+41
| | | | llvm-svn: 136250
* X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any ↵Eli Friedman2011-07-271-1/+1
| | | | | | code, and all x86 processors will honor the required semantics. llvm-svn: 136249
* ARM assembly parsing aliases for extend instructions w/o rotate.Jim Grosbach2011-07-271-0/+22
| | | | llvm-svn: 136229
* ARM cleanup of remaining extend instructions.Jim Grosbach2011-07-272-171/+122
| | | | | | | | Refactor the rest of the extend instructions to not artificially distinguish between a rotate of zero and a rotate of any other value. Replace the by-zero versions with Pat<>'s for ISel. llvm-svn: 136226
* ARM extend instructions simplification.Jim Grosbach2011-07-275-89/+87
| | | | | | | | Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not have an 'r' and an 'r_rot' version, but just a single version with a rotate that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version. llvm-svn: 136225
* Optimize 96-bit division a little bit.Jakub Staszak2011-07-271-2/+3
| | | | llvm-svn: 136222
* Move static methods to the anonymous namespace.Jakub Staszak2011-07-271-2/+7
| | | | llvm-svn: 136221
* Trim includes.Frits van Bommel2011-07-271-12/+11
| | | | llvm-svn: 136218
* Explicitly cast narrowing conversions inside {}s that will become errors inJeffrey Yasskin2011-07-275-5/+7
| | | | | | C++0x. llvm-svn: 136211
* Revert r136156, which broke several buildbots.Dan Gohman2011-07-271-1/+14
| | | | llvm-svn: 136206
* Misc mid-level changes for new 'fence' instruction.Eli Friedman2011-07-274-5/+27
| | | | llvm-svn: 136205
* Minor simplification.Eli Friedman2011-07-271-2/+2
| | | | llvm-svn: 136202
* Move some code around to open opportunity for more shuffle matchingBruno Cardoso Lopes2011-07-271-18/+18
| | | | llvm-svn: 136201
* The vpermilps and vpermilpd have different behaviour regarding theBruno Cardoso Lopes2011-07-274-32/+140
| | | | | | | | | usage of the shuffle bitmask. Both work in 128-bit lanes without crossing, but in the former the mask of the high part is the same used by the low part while in the later both lanes have independent masks. Handle this properly and and add support for vpermilpd. llvm-svn: 136200
* Remove more dead code!Bruno Cardoso Lopes2011-07-271-15/+5
| | | | llvm-svn: 136199
* Fix AliasSetTracker so that it doesn't make any assumptions about ↵Eli Friedman2011-07-271-51/+46
| | | | | | instructions it doesn't know about (like the atomic instructions I'm adding). llvm-svn: 136198
* Support .code32 and .code64 in X86 assembler.Evan Cheng2011-07-278-13/+53
| | | | llvm-svn: 136197
* It is quiet possible that inlined function body is split into multiple ↵Devang Patel2011-07-271-16/+41
| | | | | | chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry. llvm-svn: 136196
* Add support for multi-way live range splitting.Jakob Stoklund Olesen2011-07-261-64/+165
| | | | | | | | | | | | | | | | | | | | | When splitting global live ranges, it is now possible to split for multiple destination intervals at once. Previously, we only had the main and stack intervals. Each edge bundle is assigned to a split candidate, and splitAroundRegion will insert copies between the candidate intervals and the stack interval as needed. The multi-way splitting is used to split around compact regions when enabled with -compact-regions. The best candidate register still gets all the bundles it wants, but everything outside the main interval is first split around compact regions before we create single-block intervals. Compact region splitting still causes some regressions, so it is not enabled by default. llvm-svn: 136186
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