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* Avoid de-referencing pass beginning of a basic block. No small test case ↵Evan Cheng2011-04-011-18/+21
| | | | | | possible. rdar://9216009 llvm-svn: 128743
* Remove redundant code. There are assignments to variables Base and Offset ↵Akira Hatanaka2011-04-011-5/+0
| | | | | | right after the code that is removed. llvm-svn: 128742
* Simplifies logic for printing target flags.Akira Hatanaka2011-04-013-34/+29
| | | | llvm-svn: 128741
* When the architecture is explicitly armv6 or thumbv6, we need to mark the ↵Owen Anderson2011-04-011-9/+15
| | | | | | object file appropriately. llvm-svn: 128739
* LDRD/STRD instructions should print both Rt and Rt2 in the asm string.Jim Grosbach2011-04-011-10/+5
| | | | llvm-svn: 128736
* Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we ↵Johnny Chen2011-04-011-0/+8
| | | | | | | | should reject the instruction as invalid. llvm-svn: 128734
* Fix build.Benjamin Kramer2011-04-011-1/+2
| | | | llvm-svn: 128733
* InstCombine: Turn icmp + sext into bitwise/integer ops when the input has ↵Benjamin Kramer2011-04-011-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | only one unknown bit. int test1(unsigned x) { return (x&8) ? 0 : -1; } int test3(unsigned x) { return (x&8) ? -1 : 0; } before (x86_64): _test1: andl $8, %edi cmpl $1, %edi sbbl %eax, %eax ret _test3: andl $8, %edi cmpl $1, %edi sbbl %eax, %eax notl %eax ret after: _test1: shrl $3, %edi andl $1, %edi leal -1(%rdi), %eax ret _test3: shll $28, %edi movl %edi, %eax sarl $31, %eax ret llvm-svn: 128732
* InstCombine: Move (sext icmp) transforms into their own method. No intended ↵Benjamin Kramer2011-04-012-37/+43
| | | | | | functionality change. llvm-svn: 128731
* Add comments.Evan Cheng2011-04-011-2/+4
| | | | llvm-svn: 128730
* Assign node order numbers to results of call instruction lowering. This ↵Evan Cheng2011-04-011-4/+8
| | | | | | should improve src line debug info when sdisel is used. rdar://9199118 llvm-svn: 128728
* Modifies MipsAsmPrinter::isBlockOnlyReachableByFallthrough so that it ↵Akira Hatanaka2011-04-011-1/+26
| | | | | | handles delay slots correctly. llvm-svn: 128724
* Fix LDRi12 immediate operand, which was changed to be the second operand in ↵Johnny Chen2011-04-011-3/+4
| | | | | | | | $addrmode_imm12 => (ops GPR:$base, i32imm:$offsimm). rdar://problem/9219356 llvm-svn: 128722
* Add code for analyzing FP branches. Clean up branch Analysis functions.Akira Hatanaka2011-04-012-223/+138
| | | | llvm-svn: 128718
* Initialize HasVMLxForwarding.Benjamin Kramer2011-04-011-0/+1
| | | | llvm-svn: 128709
* Various Instructions' resizeOperands() methods are only used to grow theJay Foad2011-04-011-54/+16
| | | | | | list of operands. Simplify and rename them accordingly. llvm-svn: 128708
* While testing dragonegg I noticed that isCastable and getCastOpcodeDuncan Sands2011-04-011-4/+12
| | | | | | | | had gotten out of sync: isCastable didn't think it was possible to cast the x86_mmx type to anything, while it did think it possible to cast an i64 to x86_mmx. llvm-svn: 128705
* Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.Evan Cheng2011-04-013-19/+164
| | | | | | rdar://8911343 llvm-svn: 128696
* Remove unused variablesMatt Beaumont-Gay2011-04-011-3/+1
| | | | llvm-svn: 128692
* Apply again changes to support ARM memory asm parsing. I removedBruno Cardoso Lopes2011-03-319-76/+329
| | | | | | | | | | | | | | all LDR/STR changes and left them to a future patch. Passing all checks now. - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and fix the encoding wherever is possible. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases llvm-svn: 128689
* The basic register allocator must also use the inline spiller.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | | | | It is using a trivial rewriter that doesn't know how to insert spill code requested by the standard spiller. llvm-svn: 128688
* Provide a legal pointer register class when targeting thumb1.Jakob Stoklund Olesen2011-03-312-0/+7
| | | | | | The LocalStackSlotAllocation pass was creating illegal registers. llvm-svn: 128687
* Instcombile optimization: extractelement(cast) -> cast(extractelement)Nadav Rotem2011-03-311-1/+9
| | | | llvm-svn: 128683
* InstCombine: APFloat can't perform arithmetic on PPC double doubles, don't ↵Benjamin Kramer2011-03-311-2/+4
| | | | | | | | even try. Thanks Eli! llvm-svn: 128676
* Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplierEvan Cheng2011-03-313-3/+53
| | | | | | | | | | | accumulator forwarding: vadd d3, d0, d1 vmul d3, d3, d2 => vmul d3, d0, d2 vmla d3, d1, d2 llvm-svn: 128665
* Fix single word and unsigned byte data transfer instruction encodings so thatJohnny Chen2011-03-311-0/+2
| | | | | | | | Inst{4} = 0. rdar://problem/9213022 llvm-svn: 128662
* Added support for FP conditional move instructions and fixed bugs in ↵Akira Hatanaka2011-03-317-285/+377
| | | | | | handling of FP comparisons. llvm-svn: 128650
* Don't completely eliminate identity copies that also modify super register ↵Jakob Stoklund Olesen2011-03-311-6/+12
| | | | | | | | | liveness. Turn them into noop KILL instructions instead. This lets the scavenger know when super-registers are killed and defined. llvm-svn: 128645
* Add BLXi to the instruction table for disassembly purpose.Johnny Chen2011-03-312-2/+23
| | | | | | | | A8.6.23 BLX (immediate) rdar://problem/9212921 llvm-svn: 128644
* Allow kill flags on two-address instructions. They are harmless.Jakob Stoklund Olesen2011-03-311-6/+2
| | | | llvm-svn: 128643
* Mark all uses as <undef> when joining a copy.Jakob Stoklund Olesen2011-03-313-8/+20
| | | | | | | | | | | | This way, shrinkToUses() will ignore the instruction that is about to be deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like. Fix a misunderstanding in MachineVerifier about <def,undef> operands. The <undef> flag is valid on def operands where it has the same meaning as <undef> on a use operand. It only applies to sub-register defines which also read the full register. llvm-svn: 128642
* Remove dead code.Devang Patel2011-03-311-5/+1
| | | | llvm-svn: 128639
* Revert r128632 again, until I figure out what break the testsBruno Cardoso Lopes2011-03-319-322/+87
| | | | llvm-svn: 128635
* Fix bug found by valgrind.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | llvm-svn: 128634
* Add XCore intrinsics for initializing / starting / synchronizing threads.Richard Osborne2011-03-311-6/+39
| | | | llvm-svn: 128633
* Reapply r128585 without generating a lib depedency cycle. An updated log:Bruno Cardoso Lopes2011-03-319-87/+322
| | | | | | | | | | | | | - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible. - Move all instructions which use am2offset without a pattern to use addrmode2. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases llvm-svn: 128632
* lib/CodeGen/LiveIntervalAnalysis.cpp: [PR9590] Don't use ↵NAKAMURA Takumi2011-03-311-1/+3
| | | | | | | | | | std::pow(float,float) here. We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts). For consistency, std::pow(double,double) may be called instead. Or, precision issue might attack us, to see unstable regalloc and stack coloring. llvm-svn: 128629
* InstCombine: Fix transform to use the swapped predicate.Benjamin Kramer2011-03-311-2/+2
| | | | | | Thanks Frits! llvm-svn: 128628
* InstCombine: fold fcmp (fneg x), (fneg y) -> fcmp x, yBenjamin Kramer2011-03-311-0/+5
| | | | llvm-svn: 128627
* InstCombine: fold fcmp pred (fneg x), C -> fcmp swap(pred) x, -CBenjamin Kramer2011-03-311-0/+8
| | | | llvm-svn: 128626
* InstCombine: Shrink "fcmp (fpext x), C" to "fcmp x, C" if C can be ↵Benjamin Kramer2011-03-311-0/+34
| | | | | | | | losslessly converted to the type of x. Fixes PR9592. llvm-svn: 128625
* InstCombine: fold fcmp (fpext x), (fpext y) -> fcmp x, y.Benjamin Kramer2011-03-311-0/+7
| | | | llvm-svn: 128624
* Pick a conservative register class when creating a small live range for remat.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | | | | | | | | | The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. llvm-svn: 128610
* Revert "- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and"Matt Beaumont-Gay2011-03-317-285/+66
| | | | | | This revision introduced a dependency cycle, as nlewycky mentioned by email. llvm-svn: 128597
* Somehow we managed to forget to encode the lane index for a large swathe of ↵Owen Anderson2011-03-302-21/+70
| | | | | | NEON instructions. With this fix, the entire test-suite passes with the Thumb integrated assembler. llvm-svn: 128587
* Don't try to create zero-sized stack objects.Evan Cheng2011-03-302-4/+6
| | | | llvm-svn: 128586
* - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT andBruno Cardoso Lopes2011-03-307-66/+285
| | | | | | | | | | | | | | | {STR,LDC}{2}_PRE. - Fixed the encoding in some places. - Some of those instructions were using am2offset and now use addrmode2. Codegen isn't affected, instructions which use SelectAddrMode2Offset were not touched. - Teach printAddrMode2Operand to check by the addressing mode which index mode to print. - This is a work in progress, more work to come. The idea is to change places which use am2offset to use addrmode2 instead, as to unify assembly parser. - Add testcases for assembly parser llvm-svn: 128585
* Add a ARM-specific SD node for VBSL so that forms with a constant first operandCameron Zwarich2011-03-304-9/+82
| | | | | | can be recognized. This fixes <rdar://problem/9183078>. llvm-svn: 128584
* * The DSE code that tested for overlapping needed to take into account the factBill Wendling2011-03-301-1/+3
| | | | | | | | | | | | that one of the numbers is signed while the other is unsigned. This could lead to a wrong result when the signed was promoted to an unsigned int. * Add the data layout line to the testcase so that it will test the appropriate thing. Patch by David Terei! llvm-svn: 128577
* fixed typoAkira Hatanaka2011-03-301-2/+2
| | | | llvm-svn: 128574
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