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* In SimplifyDemandedUseBits, use computeKnownBits directly to handle ConstantsCraig Topper2017-04-201-15/+4
| | | | | | | | | | | | Currently we don't explicitly process ConstantDataSequential, ConstantAggregateZero, or ConstantVector, or Undef before applying the Depth limit. Instead they occur after the depth check in the non-instruction path. For the constant types that we do handle, the code is replicated from computeKnownBits. This patch fixes the missing constant handling and the reduces the amount of code by just using computeKnownBits directly for any type of Constant. Differential Revision: https://reviews.llvm.org/D32123 llvm-svn: 300849
* [globalisel] Enable tracing the legalizer with --debug-only=legalize-mirDaniel Sanders2017-04-202-6/+32
| | | | | | | | | | | | Reviewers: t.p.northover, ab, qcolombet, aditya_nandakumar, rovka, kristof.beyls Reviewed By: kristof.beyls Subscribers: dberris, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D31750 llvm-svn: 300847
* [MVT][SVE] Scalable vector MVTs (3/3)Amara Emerson2017-04-201-2/+2
| | | | | | | | | | | | Adds MVT::ElementCount to represent the length of a vector which may be scalable, then adds helper functions that work with it. Patch by Graham Hunter. Differential Revision: https://reviews.llvm.org/D32019 llvm-svn: 300842
* [mips][msa] Mask vectors holding shift amountsPetar Jovanovic2017-04-202-6/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | Masked vectors which hold shift amounts when creating the following nodes: ISD::SHL, ISD::SRL or ISD::SRA. Instructions that use said nodes, which have had their arguments altered are sll, srl, sra, bneg, bclr and bset. For said instructions, the shift amount or the bit position that is specified in the corresponding vector elements will be interpreted as the shift amount/bit position modulo the size of the element in bits. The problem lies in compiling with -O2 enabled, where the instructions for formats .w and .d are not generated, but are instead optimized away. In this case, having shift amounts that are either negative or greater than the element bit size results in generation of incorrect results when constant folding. We remedy this by masking the operands for the nodes mentioned above before actually creating them, so that the final result is correct before placed into the constant pool. Patch by Stefan Maksimovic. Differential Revision: https://reviews.llvm.org/D31331 llvm-svn: 300839
* [MVT][SVE] Scalable vector MVTs (1/3)Amara Emerson2017-04-202-15/+9
| | | | | | | | | | | | | | | | This patch adds a few helper functions to obtain new vector value types based on existing ones without needing to care about whether they are scalable or not. I've confined their use to a few common locations right now, and targets that don't have scalable vectors should never need to care about these. Patch by Graham Hunter. Differential Revision: https://reviews.llvm.org/D32017 llvm-svn: 300838
* [ARM] Fix handling of mapping symbols when changing sectionsJohn Brawn2017-04-201-1/+1
| | | | | | | | | | | ChangeSection incorrectly registers LastEMSInfo as belonging to the previous section, not the current section. This happens to work when changing sections using .section, as the previous section is set to the current section before the call to ChangeSection, but not when using .popsection. Differential Revision: https://reviews.llvm.org/D32225 llvm-svn: 300831
* [AArch64] Fix handling of zero immediate in fmov instructionsJohn Brawn2017-04-202-19/+14
| | | | | | | | | | | Currently fmov #0 with a vector destination is handle incorrectly and results in fmov #-1.9375 being emitted but should instead give an error. This is due to the way we cope with fmov #0 with a scalar destination being an alias of fmov zr, so fix this by actually doing it through an alias. Differential Revision: https://reviews.llvm.org/D31949 llvm-svn: 300830
* [AArch64] Fix handling of integer fp immediatesJohn Brawn2017-04-201-22/+13
| | | | | | | | When an integer is used as an fp immediate we're failing to check the return value of getFP64Imm, so invalid values are silently permitted. Fix this by merging together the integer and real handling. llvm-svn: 300828
* [ARM] Rename HW div feature to HW div Thumb. NFCI.Diana Picus2017-04-209-37/+39
| | | | | | | | | | | | | | | | The hardware div feature refers only to Thumb, but because of its name it is tempting to use it to check for hardware division in general, which may cause problems in ARM mode. See https://reviews.llvm.org/D32005. This patch adds "Thumb" to its name, to make its scope clear. One notable place where I haven't made the change is in the feature flag (used with -mattr), which is still hwdiv. Changing it would also require changes in a lot of tests, including clang tests, and it doesn't seem like it's worth the effort. Differential Revision: https://reviews.llvm.org/D32160 llvm-svn: 300827
* [SelectionDAG] Fix another place that was passing a large value to ↵Craig Topper2017-04-201-15/+17
| | | | | | APInt::lshrInPlace. llvm-svn: 300821
* [SelectionDAG] Use getActiveBits() and countTrailingZeros() to avoid ↵Craig Topper2017-04-201-4/+3
| | | | | | creating temporary APInts with lshr and trunc. NFCI llvm-svn: 300819
* Recommit "[APInt] Add back the asserts that check that the APInt shift ↵Craig Topper2017-04-201-2/+3
| | | | | | | | methods aren't called with values larger than BitWidth." This includes a fix to clamp a right shift of larger than BitWidth in DAG combining. llvm-svn: 300816
* [APInt] Implement APInt::intersects without creating a temporary APInt in ↵Craig Topper2017-04-201-0/+8
| | | | | | | | | | | | | | | | the multiword case Summary: This is a simple question we should be able to answer without creating a temporary to hold the AND result. We can also get an early out as soon as we find a word that intersects. Reviewers: RKSimon, hans, spatel, davide Reviewed By: hans, davide Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32253 llvm-svn: 300812
* Do not run frame verification if target does not use frame instructionsSerge Pavlov2017-04-201-0/+2
| | | | llvm-svn: 300807
* Revert "[libFuzzer] XFAIL fuzzer-oom.test on Darwin."Ahmed Bougacha2017-04-201-1/+0
| | | | | | | | This reverts commit r300127. r300759 implemented StopTheWorld for Darwin, so the test passes again. llvm-svn: 300801
* [libFuzzer] extend help for -minimize_crash to cover ↵Kostya Serebryany2017-04-191-0/+2
| | | | | | ASAN_OPTIONS=dedup_token_length=3 llvm-svn: 300800
* [APInt] Implement operator==(uint64_t) similar to ugt/ult(uint64_t) to ↵Craig Topper2017-04-191-8/+0
| | | | | | remove one of the out of line EqualsSlowCase methods. llvm-svn: 300799
* [DAE] Simplify attribute list creation, NFCReid Kleckner2017-04-191-9/+6
| | | | | | Removes a use of getSlotAttributes, which I intend to change. llvm-svn: 300795
* Revert r300789: There are Windows bot failures.Kuba Mracek2017-04-191-20/+14
| | | | llvm-svn: 300794
* Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locationsAdrian Prantl2017-04-195-19/+27
| | | | | | | | | | | - introduced in r300522 and found via the Swift LLDB testsuite. The fix is to set the location kind to memory whenever an FrameIndex location is emitted. rdar://problem/31707602 llvm-svn: 300793
* Revert "Fix bug that caused DwarfExpression to drop DW_OP_deref from FI ↵Adrian Prantl2017-04-195-27/+19
| | | | | | | | locations" This reverts commit r300790. llvm-svn: 300792
* Revert earlier change. ds permute operations affect lgkm counter. Kannan Narayanan2017-04-191-2/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D32254 llvm-svn: 300791
* Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locationsAdrian Prantl2017-04-195-19/+27
| | | | | | | | | | | - introduced in r300522 and found via the Swift LLDB testsuite. The fix is to set the location kind to memory whenever an FrameIndex location is emitted. rdar://problem/31707602 llvm-svn: 300790
* [libFuzzer] Always build libFuzzerKuba Mracek2017-04-191-14/+20
| | | | | | | | | | | | | There are two reasons why users might want to build libfuzzer: - To fuzz LLVM itself - To get the libFuzzer.a archive file, so that they can attach it to their code This change always builds libfuzzer, and supports the second use case if the specified flag is set. The point of this patch is to have something that can potentially be shipped with the compiler, and this also ensures that the version of libFuzzer is correct to use with that compiler. Differential Revision: https://reviews.llvm.org/D32096 llvm-svn: 300789
* [GlobalOpt] Simplify attribute code stripping nest, NFCReid Kleckner2017-04-191-10/+5
| | | | llvm-svn: 300787
* Simplify test for sret attribute in instcombineReid Kleckner2017-04-191-12/+6
| | | | | | | | | This change is correct because the verifier requires that at most one argument be marked 'sret'. NFC, removes a use of AttributeList slot APIs. llvm-svn: 300784
* Temporarily revert r299221 to fix nondeterminism in ThinLTO builder.Galina Kistanova2017-04-191-35/+1
| | | | llvm-svn: 300783
* X86FrameLowering: Fix getFrameIndexReference() for 'fixed' objectsMatthias Braun2017-04-192-6/+8
| | | | | | | | | | | Debug information is calculated with getFrameIndexReference() which was missing some logic for the fixed object cases (= parameters on the stack). rdar://24557797 Differential Revision: https://reviews.llvm.org/D32204 llvm-svn: 300781
* [Object] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-04-195-41/+90
| | | | | | other minor fixes (NFC). llvm-svn: 300779
* [sanitizer-coverage] remove some more stale codeKostya Serebryany2017-04-191-21/+5
| | | | llvm-svn: 300778
* Remove two unused variables (-Werror).Evgeniy Stepanov2017-04-191-3/+0
| | | | llvm-svn: 300777
* [DAG] add splat vector support for 'or' in SimplifyDemandedBitsSanjay Patel2017-04-191-2/+1
| | | | | | | | | | | I've changed one of the tests to not fold away, but we didn't and still don't do the transform that the comment claims we do (and I don't know why we'd want to do that). Follow-up to: https://reviews.llvm.org/rL300725 https://reviews.llvm.org/rL300763 llvm-svn: 300772
* [sanitizer-coverage] remove stale codeKostya Serebryany2017-04-191-66/+4
| | | | llvm-svn: 300769
* [libFuzzer] remove -output_csv option. It duplicates the default output and ↵Kostya Serebryany2017-04-194-14/+1
| | | | | | got out of sync llvm-svn: 300768
* [DAG] add splat vector support for 'xor' in SimplifyDemandedBitsSanjay Patel2017-04-192-3/+2
| | | | | | | | | This allows forming more 'not' ops, so we get improvements for ISAs that have and-not. Follow-up to: https://reviews.llvm.org/rL300725 llvm-svn: 300763
* ARMFrameLowering: Reserve emergency spill slot for large argumentsMatthias Braun2017-04-191-8/+35
| | | | | | | | | | | | | | | | Re-commit after revert in r300668. Changed getMaxFPOffset() to a more conservative heuristic instead of trying to be clever and missing for some exotic calling conventions. We need to reserve an emergency spill slot in cases with large argument types that could overflow immediate offsets for FP relative address calculations. rdar://31317893 Differential Revision: https://reviews.llvm.org/D31643 llvm-svn: 300761
* [APInt] Cast calls to add/sub/mul overflow methods to void if only their ↵Craig Topper2017-04-194-6/+6
| | | | | | | | | | overflow bool out param is used. This is preparation for a clang change to improve the [[nodiscard]] warning to not be ignored on methods that return a class marked [[nodiscard]] that are defined in the class itself. See D32207. We should consider adding wrapper methods to APInt that return the overflow flag directly and discard the APInt result. This would eliminate the void casts and the need to create a bool before the call to pass to the out param. llvm-svn: 300758
* AMDGPU: Custom lower illegal small select typesMatt Arsenault2017-04-191-0/+29
| | | | | | | Promote them to i32 vectors to avoid unpacking and re-packing the vectors. llvm-svn: 300754
* Code style change as suggested in https://reviews.llvm.org/D32177 (NFC)Dehao Chen2017-04-191-16/+11
| | | | llvm-svn: 300753
* [ARM] Remove redundant computeKnownBits helper.Eli Friedman2017-04-191-29/+14
| | | | | | | | | | | | Move the BFI logic to computeKnownBitsForTargetNode, and delete the redundant CMOV logic. This is intended as a cleanup, but it's probably possible to construct a case where moving the BFI logic allows more combines. Differential Revision: https://reviews.llvm.org/D31795 llvm-svn: 300752
* [GISEL]: Move getConstantVReg to UtilsAditya Nandakumar2017-04-193-17/+18
| | | | | | NFCI llvm-svn: 300751
* [ARM] Use TableGen patterns to select vtbl. NFC.Eli Friedman2017-04-193-92/+59
| | | | | | Differential Revision: https://reviews.llvm.org/D32103 llvm-svn: 300749
* [SCEV] Make SCEV or modeling more aggressive.Eli Friedman2017-04-191-22/+6
| | | | | | | | | | Use haveNoCommonBitsSet to figure out whether an "or" instruction is equivalent to addition. This handles more cases than just checking for a constant on the RHS. Differential Revision: https://reviews.llvm.org/D32239 llvm-svn: 300746
* Using address range map to speedup finding inline stack for address.Dehao Chen2017-04-192-43/+48
| | | | | | | | | | | | | | | | | | | | Summary: In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places: * linear search for the top-level DIE * recursive linear traverse the DIE tree to find the path to the leaf DIE In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead. Reviewers: dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32177 llvm-svn: 300742
* PR32710: Disable using PMADDWD for unsigned short.Dehao Chen2017-04-191-1/+1
| | | | | | | | | | | | | | Summary: PMADDWD can only handle signed short. Reviewers: mkuper, wmi Reviewed By: mkuper Subscribers: andreadb, llvm-commits Differential Revision: https://reviews.llvm.org/D32236 llvm-svn: 300737
* AMDGPU: Don't emit amd_kernel_code_t for callable functionsMatt Arsenault2017-04-191-1/+14
| | | | | | | | | | | | This is inserted directly in the text section. The relocation for the function ends up resolving to the beginning of the amd_kernel_code_t header rather than the actual function entry point. Also skip some of the comments for initialization that only makes sense for kernels. llvm-svn: 300736
* StructurizeCFG: Directly invert cmp instructionsMatt Arsenault2017-04-191-2/+12
| | | | | | | | | | | | | | | | The most common case for a branch condition is a single use compare. Directly invert the branch predicate rather than adding a lot of xor i1 true which the DAG will have to fold later. This produces nicer to read structurizer output. This produces some random changes in codegen due to the DAG swapping branch conditions itself, and then does a poor job of dealing with those inverts. llvm-svn: 300732
* [GVN] Don't coerce non-integral pointers to integers or vice versaSanjoy Das2017-04-191-0/+5
| | | | | | | | | | | | | | | | | Summary: See http://llvm.org/docs/LangRef.html#non-integral-pointer-type The NewGVN test does not fail without these changes (perhaps it does try to coerce pointers <-> integers to begin with?), but I added the test case anyway. Reviewers: dberlin Subscribers: mcrosier, llvm-commits, Prazek Differential Revision: https://reviews.llvm.org/D32208 llvm-svn: 300730
* ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.Tim Northover2017-04-191-3/+3
| | | | llvm-svn: 300726
* [DAG] add splat vector support for 'and' in SimplifyDemandedBitsSanjay Patel2017-04-192-2/+2
| | | | | | | | | | | | | | | | | | | | | The patch itself is simple: stop discriminating against vectors in visitAnd() and again in SimplifyDemandedBits(). Some notes for reference: 1. We're not consistent about calls to SimplifyDemandedBits in the various visitXXX functions. Sometimes, we check if the RHS is a constant first. Other times (like here), we just dive in. 2. I'd like to break the vector shackles in steps for the sake of risk minimization, but we could make similar simultaneous changes in other places if we think that would be better. 3. I don't know what the intent of the changed tests in this patch was supposed to be, but since they wiggled in a positive way, I'm just going with that. :) 4. In the rotate tests, note that we can see through non-splat constants. This is a result of D24253. 5. My motivation for being here now is to make D31944 look better, so this is step 1 of N towards improving the vector codegen in that patch without writing any actual new code. Differential Revision: https://reviews.llvm.org/D32230 llvm-svn: 300725
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