summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorSanjay Patel <spatel@rotateright.com>2017-04-19 22:00:00 +0000
committerSanjay Patel <spatel@rotateright.com>2017-04-19 22:00:00 +0000
commit0658a95a350fe312a4a60bc340600f582755fd23 (patch)
tree893f0642883f33d25ced1d1392206974d775157b /llvm/lib
parent4a3a870da9fb88e2c5f6be4e603121a5b89d968e (diff)
downloadbcm5719-llvm-0658a95a350fe312a4a60bc340600f582755fd23.tar.gz
bcm5719-llvm-0658a95a350fe312a4a60bc340600f582755fd23.zip
[DAG] add splat vector support for 'or' in SimplifyDemandedBits
I've changed one of the tests to not fold away, but we didn't and still don't do the transform that the comment claims we do (and I don't know why we'd want to do that). Follow-up to: https://reviews.llvm.org/rL300725 https://reviews.llvm.org/rL300763 llvm-svn: 300772
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 9f50bfe7bfb..66afc905ca0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -4225,8 +4225,7 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
return Load;
// Simplify the operands using demanded-bits information.
- if (!VT.isVector() &&
- SimplifyDemandedBits(SDValue(N, 0)))
+ if (SimplifyDemandedBits(SDValue(N, 0)))
return SDValue(N, 0);
return SDValue();
OpenPOWER on IntegriCloud